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PM6344 Datasheet(PDF) 144 Page - PMC-Sierra, Inc |
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PM6344 Datasheet(HTML) 144 Page - PMC-Sierra, Inc |
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144 / 256 page ![]() STANDARD PRODUCT PMC-Sierra, Inc. PM6344 EQUAD PMC-951013 ISSUE 5 QUADRUPLE E1 FRAMER 131 TPSC Internal Registers 40-5FH: IDLE Code byte Bit Type Function Bit 7 R/W IDLE7 Bit 6 R/W IDLE6 Bit 5 R/W IDLE5 Bit 4 R/W IDLE4 Bit 3 R/W IDLE3 Bit 2 R/W IDLE2 Bit 1 R/W IDLE1 Bit 0 R/W IDLE0 The contents of the IDLE Code byte register are substituted for the timeslot data on BTPCM when the SUBS bit in the PCM Control Byte is set to a logic 1 and the DS[0] bit in the PCM Control Byte is set to a logic 0. The IDLE Code is transmitted from MSB (bit 7) to LSB (bit 0). |
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