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PM6344 Datasheet(PDF) 148 Page - PMC-Sierra, Inc |
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PM6344 Datasheet(HTML) 148 Page - PMC-Sierra, Inc |
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148 / 256 page ![]() STANDARD PRODUCT PMC-Sierra, Inc. PM6344 EQUAD PMC-951013 ISSUE 5 QUADRUPLE E1 FRAMER 135 Register 036H, 0B6H, 136H, 1B6H: XFDL Transmit Data Bit Type Function Default Bit 7 R/W TD7 X Bit 6 R/W TD6 X Bit 5 R/W TD5 X Bit 4 R/W TD4 X Bit 3 R/W TD3 X Bit 2 R/W TD2 X Bit 1 R/W TD1 X Bit 0 R/W TD0 X Data written to this register is serialized and transmitted on the facility data link least significant bit first. The XFDL block signals when the next data byte is required by setting the TDLINT[x] output high (if enabled) and by setting the INT bit in the Status register high. When INT and/or TDLINT[x] is set, the Transmit Data register must be written with the new data within 4 data bit periods to prevent the occurrence of an underrun. |
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