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S124 Datasheet(PDF) 39 Page - Renesas Technology Corp |
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S124 Datasheet(HTML) 39 Page - Renesas Technology Corp |
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39 / 98 page ![]() R01DS0264EU0100 Rev.1.00 Page 39 of 95 Feb 23, 2016 S124 2. Electrical Characteristics 2.3 AC Characteristics 2.3.1 Frequency Note 1. The lower-limit frequency of ICLK is 1 MHz while programming or erasing the flash memory. When using ICLK for programming or erasing the flash memory at below 4 MHz, the frequency can be set to 1 MHz, 2 MHz, or 3 MHz. A non-integer frequency such as 1.5 MHz cannot be set. Note 2. The frequency accuracy of ICLK must be ±3.5% while programming or erasing the flash memory. Confirm the frequency accuracy of the clock source. Note 3. The lower-limit frequency of PCLKD is 4 MHz at 2.4 V or above and 1 MHz at below 2.4 V when the 14-bit A/D converter is in use. Note 4. See section 8, Clock Generation Circuit in User’s Manual for the relationship of frequencies between ICLK, PCLKB, and PCLKD. Note 1. The lower-limit frequency of ICLK is 1 MHz while programming or erasing the flash memory. When using ICLK for programming or erasing the flash memory at below 4 MHz, the frequency can be set to 1 MHz, 2 MHz, or 3 MHz. A non-integer frequency such as 1.5 MHz cannot be set. Note 2. The frequency accuracy of ICLK must be ±3.5% while programming or erasing the flash memory. Confirm the frequency accuracy of the clock source. Note 3. The lower-limit frequency of PCLKD is 4 MHz at 2.4 V or above and 1 MHz at below 2.4 V when the 14-bit A/D converter is in use. Note 4. See section 8, Clock Generation Circuit in User’s Manual for the relationship of frequencies between ICLK, PCLKB, and PCLKD. Table 2.16 Operation frequency in high-speed operating mode Conditions: VCC = AVCC0 = 2.4 to 5.5 V Item Symbol Min Typ Max Unit Operation frequency System clock (ICLK)*1, *2, *4 2.7 to 5.5 V f 0.032768 - 32 MHz 2.4 to 2.7 V 0.032768 - 16 Peripheral module clock (PCLKB)*4 2.7 to 5.5 V - - 32 2.4 to 2.7 V - - 16 Peripheral module clock (PCLKD)*3, *4 2.7 to 5.5 V - - 64 2.4 to 2.7 V - - 16 Table 2.17 Operation frequency in middle-speed mode Conditions: VCC = AVCC0 = 1.8 to 5.5 V Item Symbol Min Typ Max Unit Operation frequency System clock (ICLK)*1, *2, *4 2.7 to 5.5 V f 0.032768 - 12 MHz 2.4 to 2.7 V 0.032768 - 12 1.8 to 2.4 V 0.032768 - 8 Peripheral module clock (PCLKB)*4 2.7 to 5.5 V - - 12 2.4 to 2.7 V - - 12 1.8 to 2.4 V - - 8 Peripheral module clock (PCLKD)*3, *4 2.7 to 5.5 V - - 12 2.4 to 2.7 V - - 12 1.8 to 2.4 V - - 8 |
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