S124 datasheet(85/98 Pages) RENESAS

85 / 98 page

R01DS0264EU0100 Rev.1.00

Page 85 of 95

Feb 23, 2016

S124

2. Electrical Characteristics

2.12

Flash Memory Characteristics

2.12.1

Code Flash Memory Characteristics

Note 1. The reprogram/erase cycle is the number of erasures for each block. When the reprogram/erase cycle is n times

(n = 1,000), erasing can be performed n times for each block. For instance, when 4-byte programming is

performed 256 times for different addresses in 1-KB blocks, and then the entire block is erased, the reprogram/

erase cycle is counted as one. However, programming the same address for several times as one erasure is not

enabled. (overwriting is prohibited.)

Note 2. Characteristic when using the flash memory programmer and the self-programming library provided by Renesas

Electronics.

Note 3. This result is obtained from reliability testing.

Note 1. Does not include the time until each operation of the flash memory is started after instructions are executed by

the software.

Note 2. The lower-limit frequency of ICLK is 1 MHz during programming or erasing the flash memory. When using ICLK

at below 4 MHz, the frequency can be set to 1 MHz, 2 MHz, or 3 MHz. A non-integer frequency such as 1.5 MHz

cannot be set.

Note 3. The frequency accuracy of ICLK must be ±3.5% while programming or erasing the flash memory. Confirm the

frequency accuracy of the clock source.

Table 2.56

Code flash characteristics (1)

Item

Symbol

Min

Typ

Max

Unit

Conditions

Reprogramming/erasure cycle*1

NPEC

1000

Times

Data hold time

After 1000 times NPEC

tDRP

20*2, *3

Year

Ta = +85°C

Table 2.57

Code flash characteristics (2)

High-speed operating mode

Conditions: VCC = AVCC0 = 2.7 to 5.5 V

Item

Symbol

ICLK = 1 MHz

ICLK = 32 MHz

Unit

Min

Typ

Max

Min

Typ

Max

Programming time

4-byte

tP4

116

998

506

μs

Erasure time

1-KB

tE1K

9.03

287

5.67

222

Blank check time

4-byte

tBC4

56.8

16.6

μs

1-KB

tBC1K

1899

140

μs

Erase suspended time

tSED

22.5

10.7

μs

Startup area switching setting time

tSAS

21.9

585

12.1

447

Access window time

tAWS

21.9

585

12.1

447

OCD/serial programmer ID setting time

tOSIS

21.9

585

12.1

447

Flash memory mode transition wait

time 1

tDIS

μs

Flash memory mode transition wait

time 2

tMS

μs

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