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IPAC-X Datasheet(PDF) 10 Page - Infineon Technologies AG

Part # IPAC-X
Description  ISDN PC Adapter Circuit
PDF  270 Pages
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Manufacturer  INFINEON [Infineon Technologies AG]
Direct Link  http://www.infineon.com
Logo INFINEON - Infineon Technologies AG

IPAC-X Datasheet(HTML) 10 Page - Infineon Technologies AG

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IPAC-X
PSB/PSF 21150
List of Figures
Page
Data Sheet
10
2003-01-30
Figure 39
Buffered Oscillator Clock Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
Figure 40
Layer-1 Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
Figure 41
State Diagram Notation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
Figure 42
State Transition Diagram (TE, LT-T) . . . . . . . . . . . . . . . . . . . . . . . . . . 76
Figure 43
State Transition Diagram of Unconditional Transitions (TE, LT-T) . . . 77
Figure 44
State Transition Diagram (LT-S) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
Figure 45
State Transition Diagram (NT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
Figure 46
Example of Activation/Deactivation Initiated by the Terminal . . . . . . . 91
Figure 47
Example of Activation/Deactivation initiated by the Terminal (TE).
Activation/Deactivation Completely Under Software Control . . . . . . . . 92
Figure 48
Example of Activation/Deactivation Initiated by the Network
Termination (NT). Activation/Deactivation Completely Under
SoftwarControl . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
Figure 49
IOM
Ò-2 Frame Structure in Terminal Mode . . . . . . . . . . . . . . . . . . . . 95
Figure 50
Multiplexed Frame Structure of the IOM-2 Interface
in Non-TE Timing Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
Figure 51
Architecture of the IOM Handler (Example Configuration). . . . . . . . . . 98
Figure 52
Data Access via CDAx1 and CDAx2 Register Pairs . . . . . . . . . . . . . 100
Figure 53
Examples for Data Access via CDAxy Registers . . . . . . . . . . . . . . . . 101
Figure 54
Data Access when Looping TSa from DU to DD . . . . . . . . . . . . . . . . 102
Figure 55
Data Access When Shifting TSa to TSb on DU (DD) . . . . . . . . . . . . 103
Figure 56
Example for Monitoring Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104
Figure 57
Interrupt Structure of the Synchronous Data Transfer . . . . . . . . . . . . 106
Figure 58
Examples for the Synchronous Transfer Interrupt Control With One
Enabled STIxy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107
Figure 59
Timeslot Assignment on IOM-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
Figure 60
Examples for HDLC Controller Access . . . . . . . . . . . . . . . . . . . . . . . 110
Figure 61
Timeslot Assignment on S . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
Figure 62
Mapping of Bits from IOM-2 to S . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
Figure 63
Data Strobe Signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113
Figure 64
Strobed IOM-2 Bit Clock. Register SDS_CONF Programmed to 01H 114
Figure 65
Examples of MONITOR Channel Applications in IOM -2 TE Mode . . 115
Figure 66
MONITOR Channel Protocol (IOM-2) . . . . . . . . . . . . . . . . . . . . . . . . 118
Figure 67
Monitor Channel, Transmission Abort Requested by the Receiver . . 121
Figure 68
Monitor Channel, Transmission Abort Requested by the Transmitter 121
Figure 69
Monitor Channel, Normal End of Transmission . . . . . . . . . . . . . . . . . 122
Figure 70
MONITOR Interrupt Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125
Figure 71
CIC Interrupt Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127
Figure 72
Applications of TIC Bus in IOM-2 Bus Configuration . . . . . . . . . . . . . 129
Figure 73
Structure of Last Octet of Ch2 on DU . . . . . . . . . . . . . . . . . . . . . . . . 130
Figure 74
Structure of Last Octet of Ch2 on DD . . . . . . . . . . . . . . . . . . . . . . . . 131
Figure 75
D-Channel Access Control on the S-Interface . . . . . . . . . . . . . . . . . . 132



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