CS5530A datasheet(219/259 Pages) AMD

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AMD Geode™ CS5530A Companion Device Data Book

219

Revision 1.1

Table 5-29. Programmable Interval Timer Registers

Bit

Description

I/O Port 040h

Write

PIT Timer 0 Counter

7:0

Counter Value

Read

PIT Timer 0 Status

Counter Output: State of counter output signal.

Counter Loaded: Last count written is loaded? 0 = Yes; 1 = No.

5:4

Current Read/Write Mode: 00 = Counter latch command; 01 = R/W LSB only; 10 = R/W MSB only; 11 = R/W LSB, followed

by MSB.

3:1

Current Counter Mode: 0-5.

BCD Mode: 0 = Binary; 1 = BCD (binary coded decimal).

I/O Port 041h

Write

PIT Timer 1 Counter (Refresh)

7:0

Counter Value

Read

PIT Timer 1 Status (Refresh)

Counter Output: State of counter output signal.

Counter Loaded: Last count written is loaded? 0 = Yes; 1 = No.

5:4

Current Read/Write Mode: 00 = Counter latch command; 01 = R/W LSB only; 10 = R/W MSB only; 11 = R/W LSB, followed

by MSB.

3:1

Current Counter Mode: 0-5.

BCD Mode: 0 = Binary; 1 = BCD (binary coded decimal).

I/O Port 042h

Write

PIT Timer 2 Counter (Speaker)

7:0

Counter Value

Read

PIT Timer 2 Status (Speaker)

Counter Output: State of counter output signal.

Counter Loaded: Last count written is loaded? 0 = Yes; 1 = No.

5:4

Current Read/Write Mode: 00 = Counter latch command; 01 = R/W LSB only; 10 = R/W MSB only; 11 = R/W LSB, followed

by MSB.

3:1

Current Counter Mode: 0-5.

BCD Mode: 0 = Binary; 1 = BCD (binary coded decimal).

I/O Port 043h (R/W)

PIT Mode Control Word Register

7:6

Counter Select: 00 = Counter 0; 01 = Counter 1; 10 = Counter 2; 11 = Read-back command (Note 1).

5:4

Current Read/Write Mode: 00 = Counter latch command (Note 2); 01 = R/W LSB only; 10 = R/W MSB only; 11 = R/W LSB,

followed by MSB.

3:1

Current Counter Mode: 0-5.

BCD Mode: 0 = Binary; 1 = BCD (binary coded decimal).

Notes: 1. If bits [7:6] = 11: Register functions as Read Status Command

Bit 5 = Latch Count, Bit 4 = Latch Status, Bit 3 = Select Counter 2, Bit 2 = Select Counter 1, Bit 1 = Select Counter 0, and Bit

0 = Reserved

2. If bits [5:4] = 00: Register functions as Counter Latch Command

Bits [7:6] = Selects Counter, and [3:0] = Don’t care

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