FS98O21 datasheet(32/136 Pages) FORTUNE

32 / 136 page

FS98O21

Rev. 1.7

32/136

Voltage Doubler

Figure 4-2 Voltage Doubler

Voltage Doubler is used for generating VGG which provide input

3 for VDDA Voltage Regulator. The inputs of

Voltage Doubler are VDDP, VSSP, CA and CB. The related registers are S_PCK and ENPUMP. The Output is

VGG. Please see Figure 4-2.

Table 4-2 Voltage Doubler register table

Addre

Name

Reference

d Section

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Value on

Power on

Reset

14h

MCK

M7_CK

M6_CK

M5_CK

M3_CK

M2_CK

M1_CK

M0_CK

00000000

15h

PCK

4/5/7.5/10

ENPUMP

S_PCK

00000000

Operations:

Connect the pins VDDP and VSSP to VDD (2.2V~3.6V) and VSS (system ground).

Put a 10uF capacitance between CA and CB.

Select the Voltage Doubler Operation frequency by setting S_PCK and M0_CK

4 according to the

following table

Set the ENPUMP flag.

The output, VGG, will be 2 times of VDDP.

3 Please refer to Section 4.2 for detailed description about VDDA and Voltage regulator.

4 M0_CK is the 1st bit of the MCK register. Please refer to Section 5.0

Voltage Doubler

ENPUMP

S_PCK

C2 10uF

C3 1uF

C1 10uF

FS98O21 Datasheet(PDF) 32 Page - Fortune Semiconductor Corp.

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