 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
FS98O21 Datasheet(PDF) 88 Page - Fortune Semiconductor Corp. |
|
|
|||||||||||||||||||||||||||||
FS98O21 Datasheet(HTML) 88 Page - Fortune Semiconductor Corp. |
|
|
88 / 136 page  FS98O21 Rev. 1.7 88/136 Table 9-2 I2C register table Address Name Referenced Section Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Value on Power on Reset 06h INTF 3/6/7/9/10/11 -- I2CIF -- -- -- 00000000 07h INTE 3/6/7/9/10/11 GIE -- I2CIE -- -- -- 00000000 37h PT2OCB 9 PT2OC[4:3] uuu11uuu 57h I2CCON 9 WCOL I2COV I2CEN CKP 0001uuuu 58h I2CSTA 9 DA P S RW BF uu0000u0 59h I2CADD 9 I2CADD [7:0] 00000000 5Ah I2CBUF 9 I2CBUF [7:0] 00000000 I2C data receive operation: (master to slave) 1. Configure SCL and SDA pins as open-drain through the PTOCB[4:3] 2. Set I2CEN register flag to enable the I2C module. 3. Clear I2CIF to reset the I2C interrupt. 4. Set I2CIE and GIE to enable the I2C interrupt. 5. Wait for the interrupt. 6. When the I2C master device sends data to slave side, the data (ID) transmitted from the master device will be sent to I2CBUF, and the BF register flag will be set. 7. If the RW register flag is set, the I2C module will enter the receive mode. 8. The acknowledgement signal will be sent automatically and an interrupt will occur. 9. Clear the I2CIF and reset the interrupt to wait for the interrupt happened again. 10. When an interrupt occurs, read the I2CBUF for receiving the data transmitted from master side. The acknowledgement signal will be sent automatically. 11. If the user doesn’t read the data from I2CBUF, the BF register flag will be held high. When the data is sent to slave again, the I2COV register flag will be set, and the interrupt will NOT happen. SDA A7A6 A5A4A3 A2A1 12 34 56 78 9 12 34 5 678 9 1 234 567 89 SCL D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0 I2CIF (INTF<3>) BF (I2CSTA<0>) I2COV (I2CCON<6>) S P Receiving Address R/W = 0 __ ACK ____ ACK ____ ACK ____ Receiving Data Receiving Data Cleared in software I2CBUF is read I2COV is set Because I2CBUF is still full. ACK is not sent. ____ Bus Master terminates transfer I2C Waveforms for Reception Figure 9-3 I2C waveform for reception |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
