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FS98O21 Datasheet(PDF) 63 Page - Fortune Semiconductor Corp. |
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FS98O21 Datasheet(HTML) 63 Page - Fortune Semiconductor Corp. |
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63 / 136 page  FS98O21 Rev. 1.7 63/136 Register PT2MR at address 27h property R/W-0 U-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 PT2MR BZEN PM1EN E1M[1:0] E0M[1:0] Bit7 Bit0 Bit 7 BZEN : Buzzer enable flag (Please refer to Section 7.5 for detail) 1 = Buzzer function is enabled, GPIO Port 2 bit 7 is defined as Buzzer output. 0 = Buzzer function is disabled, GPIO Port 2 bit 7 is defined as GPIO. Bit 4 PM1EN : PDM Module enable flag (Please refer to Chapter 8 for detail) 1 = PDM Module is enabled, GPIO Port 2 bit 2 is defined as PDM output. 0 = PDM Module is disabled, GPIO Port 2 bit 2 is defined as GPIO. Bit 3-2 E1M[1:0]: GPIO Port 2 bit 1 interrupt trigger mode (Please refer to Section 7.2 for detail) 11 = External Interrupt 1 (GPIO Port 2 bit 1) is triggered at state change 10 = External Interrupt 1 (GPIO Port 2 bit 1) is triggered at state change 01 = External Interrupt 1 (GPIO Port 2 bit 1) is triggered at positive edge 00 = External Interrupt 1 (GPIO Port 2 bit 1) is triggered at negative edge Bit 1-0 E0M[1:0]: GPIO Port 2 bit 0 interrupt trigger mode (Please refer to Section 7.2 for detail) 11 = External Interrupt 0 (GPIO Port 2 bit 0) is triggered at state change 10 = External Interrupt 0 (GPIO Port 2 bit 0) is triggered at state change 01 = External Interrupt 0 (GPIO Port 2 bit 0) is triggered at positive edge 00 = External Interrupt 0 (GPIO Port 2 bit 0) is triggered at negative edge property R = Readable bit W = Writable bit U = unimplemented bit - n = Value at Power On Reset ‘1’ = Bit is Set ‘0’ = Bit is Cleared X = Bit is unknown |
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