FS98O21 datasheet(66/136 Pages) FORTUNE

66 / 136 page

FS98O21

Rev. 1.7

66/136

Read data Operation

Clear the PT1EN[n]

9 register flags. The PT1[n] will be defined as an input port.

Set the PT1PU[n] register as required. The PT1[n] will be connected to an internal pull up resistor.

Set the AIENB[n] register flags if the input signals are analog signals.(n = 7 to 0)

Clear the AIENB[n] register flags if the input signals are analog signals. (n = 5 to 0

10)

The VDDA Regulator must be enabled first, and then the AIN0~AIN5 can work correctly. (Please refer to

Chapter 4)

After the signal input from outside, users can get the data through PT1[n]

Write data Operation

Set the PT1EN[n] register flags. The PT1[n] will be defined as an output port.

Set the PT1PU[n] register as required. The PT1[n] will be connected to an internal pull up resistor.

Set the PT1[n] to output the data. The embedded D Flip Flop will latch the data till PT1[n] is changed.

Notice Operation

To keep low operation current in SLEEP mode, set AIENB[7:0] to let the PT1 be floating.

Parallel a small resistor (about 10k ohm) between ports and VDD to increase the possible output current

when the PT1PU[n] is set.

Digital I/O Port and External Interrupt Input : PT2[0], PT2[1]

PT2PU[1:0]

PT2EN[1:0]

PT2[1:0]

LOAD

Write

AR==PT2

READ&AR==PT2

Databus[7:0]

Figure 7-2 PT2[0] PT2[1] function block

GPIO Port 2 Bit1 and Bit 0 (PT2[1:0]) function block is shown in Figure 7-2. The main function of the GPIO is

input and output data between the Data bus and the ports. Users could control the PT2EN[1:0] register flags to

decide the input output direction. The input and output function and the related functions are explained as

follows:

9 n means the bits indexes user want to control

10 PT1 bit6 and bit7 could only be defined as digital signal input.

FS98O21 Datasheet(PDF) 66 Page - Fortune Semiconductor Corp.