FS98O21 datasheet(6/136 Pages) FORTUNE

6 / 136 page

FS98O21

Rev. 1.7

6/136

Figure List

Figure 1-1 FS98O21 pin configuration ......................................................................................... 12

Figure 1-2 FS98O21 function block .............................................................................................. 14

Figure 1-3 FS98O21 CPU core function block ............................................................................. 16

Figure 1-4 FS98O21 instruction cycle .......................................................................................... 18

Figure 2-1 VDDA vs Temp @ VDD=3V

Figure 2-2 VREF vs Temp @ VDD=3V....................... 20

Figure 3-1 FS98O21 program memory structure......................................................................... 21

Figure 3-2 IND & FSR function description.................................................................................. 23

Figure 4-1 FS98O21 power system block .................................................................................... 28

Figure 4-2 Voltage Doubler............................................................................................................ 32

Figure 4-3 Voltage regulator.......................................................................................................... 34

Figure 4-4 analog bias circuit ....................................................................................................... 35

Figure 4-5 analog common voltage generator............................................................................. 36

Figure 4-6 low battery comparator function block ...................................................................... 37

Figure 4-7 Bandgap voltage and temperature sensor function block ....................................... 38

Figure 5-1 FS98O21 clock system function block....................................................................... 39

Figure 5-2 FS98O21 oscillator state block ................................................................................... 40

Figure 6-1 FS98O21 timer module function block....................................................................... 51

Figure 6-2 watch dog timer function block .................................................................................. 55

Figure 7-1 PT1[7:0] function block ............................................................................................... 65

Figure 7-2 PT2[0] PT2[1] function block....................................................................................... 66

Figure 7-3 PT2[2] function block .................................................................................................. 69

Figure 7-4 PT2[3] PT2[4] function block....................................................................................... 71

Figure 7-5 PT2[6:5] function block ............................................................................................... 73

Figure 7-6 PT2[7] function block .................................................................................................. 75

Figure 8-1 FS98O21 PDM module function block........................................................................ 77

Figure 8-2 PDM module signal generation................................................................................... 78

Figure 9-1 FS98O21 I2C module communication ........................................................................ 83

Figure 9-2 I2C module function block .......................................................................................... 84

Figure 9-3 I2C waveform for reception......................................................................................... 88

Figure 9-4 I2C waveforms for transmission................................................................................. 89

Figure 10-1 FS98O21 analog function network ........................................................................... 90

Figure 10-2 FS98O21 ADC function block.................................................................................... 99

Figure 12-1 single end amplifier application example .............................................................. 107

Figure 12-2 differential amplifier example ................................................................................. 108

Figure 13-1 LCD driver control block ......................................................................................... 109

Figure 13-2 LCD control mode .................................................................................................... 109

Figure 13-3 LCD duty mode working cycle.................................................................................111

Figure 13-4 1/3 bias LCD power system circuit connection example.......................................112

Figure 13-5 1/3 bias LCD power system clock ...........................................................................112

Figure 13-6 1/2 bias LCD power system circuit connection example.......................................113

Figure 13-7 1/2 bias LCD power system clock ...........................................................................113

Figure 16-1 FS98O21 package outline........................................................................................ 135

FS98O21 Datasheet(PDF) 6 Page - Fortune Semiconductor Corp.

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