FS98O21 datasheet(83/136 Pages) FORTUNE

83 / 136 page

FS98O21

Rev. 1.7

83/136

I2C Module (slave mode only)

FS98O21 embeds a slave mode I2C module. The two pins, SCL and SDA, are used to perform the I2C system.

The pin SCL is assigned to be the clock pin, and the pin SDA is assigned to be the data pin in the I2C module.

In an I2C system, there are master side and slave side. Master side would send the clock, slave ID and the

commands to slave side. One master could connect to several slave sides with different IDs. First of all, the

slave side would check if the ID sent by master side is the same as itself. If the ID matched, slave side would

check the following bit from master. If the bit was high, it means that master side want to transfer some data or

command to slave, so slave side should sent back an acknowledgement signal and then receive the data from

master side. On the other hand, if the bit was low, it means that master side want to receive the data from slave

side, so slave side should sent back an acknowledgement signal and then transmit the data back.( Please see

Figure 9-1)

Figure 9-1 FS98O21 I2C module communication

In the I2C module embedded in FS98O21, there are 5 register flags shown in following figure. The SCL and

SDA signal is connected to I2CSR and the Start and stop bit detector. The I2CSR is assigned to be the data

buffer. When some signal is sent from master, the Start and stop bit detector will respond to the situation, and

the Match detector will determine if the input data is matched with the slave ID. If it matches the ID, the user

should send back the acknowledgement (data high) to respond to the master side. No matter whether the I2C

module sends the data or receives the data, the I2CBUF is assigned to be the buffer. When the module

receives the data, the data signals will be stored in the I2CSR, and send the whole data to I2CBUF after the

data is sent completely.

slave ID

data

ack

slave ID

ack

Data1

ack

….

Master

receive

data

Master

transmit

data

….

Master to slave

Slave to master

start

stop

start

stop

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