TPS66021 datasheet(6/38 Pages) TI1

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TPS66020, TPS66021

SLVSEW8 – AUGUST 2019

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6.6 PP5V Power Switch Characteristics

Operating under these conditions unless otherwise noted: -10

℃ ≤ TJ ≤ 125 ℃, 2.85V ≤ VVIN ≤ 5.5V, RIREF = 75 kΩ ±1%

overall tolerance, 4.9V

≤ VPP5V ≤ 5.5V

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

RPP5V

Resistance from PP5V to VBUS

ILOAD = 1 A, PP5V = 5.0V, TJ =

℃, SRC 1P5A or SRC 3P0A

state.

mΩ

ILOAD = 1 A, PP5V = 5.0V, -10 ℃ ≤

TJ ≤ 125 ℃, SRC 1P5A or SRC

3P0A state.

mΩ

ISC_IREF

Short circuit current from VBUS

with IREF terminal shorted.

VIREF = 0V, SRC 1P5A or SRC

3P0A state.

VIREF

Output voltage

SRC 1.5A state

0.56

SRC 3.0A state

1.13

ILIM_PP5V_1P5

Current limit for 1.5A setting

SRC 1.5A state

1.60

1.74

1.87

ILIM_PP5V_3P0

Current limit for 3.0A setting

SRC 3.0A state

3.2

3.45

3.7

ILIMPP5VF

Difference between current limit

and current limit fault flag assertion,

ILIM5VF ≤ ILIM5V.

SRC 1P5A or SRC 3P0A state.

PP5V = 5V. Sweep load current

and monitor FLT transition from 1

to 0 (50% point). CFLT = 20pF, RPU

= 10 kΩ to VLDO.

tILIMIT_FLT

Time from PP5V current limit

detected until FLT asserted low.

SRC 1P5A or SRC 3P0A state.

PP5V = 5V. Sweep load current

and monitor FLT transition from 1

to 0 (50% point). CFLT = 20pF, RPU

= 10 kΩ to VLDO.

VPP5V_RCP

Maximum voltage due to reverse

current. Source path disables due

to RCP comparator.

SRC 1P5A or SRC 3P0A state.

VPP5V = 5.5V, ramp VVBUS from

5.5V to 21V at 75 V/ms, CPP5V =

47µF, measure VPP5V

5.8

VPP5V_RCP_OVP

Maximum voltage due to reverse

current. Source path disables due

to OVP protection on PP5V.

SRC 1P5A or SRC 3P0A state.

VPP5V = 5.5V, ramp VVBUS from

5.5V to 21V at 5 V/ms, CPP5V =

4.7µF, measure VPP5V

6.25

VRCP_THRES_PP5V

Reverse current blocking voltage

threshold for PP5V switch

tOS_PP5V

Response time to VBUS short

circuit

VBUS to GND through 10mΩ

1.0

µs

tON_PP5V

PP5V enable time.

RL = 100Ω, VPP5V = 5V, CL=0,

Transition from DISABLED state to

SRC 1.5A state, VVBUS reaches

90% of final value.

2.6

4.5

5.3

tOFF_PP5V

PP5V disable time.

RL = 100Ω, VPP5V = 5V, CL=0,

Transition from SRC 1.5A or SRC

3.0A state to DISABLED state,

VVBUS at 10% of final value.

0.5

0.7

1.2

tRISE_PP5V

VBUS from 10% to 90% of final

value

RL = 100Ω, VPP5V = 5V, CL=0,

Transition from DISABLED state to

SRC 1.5A state

0.9

1.2

1.7

tFALL_PP5V

VBUS from 90% to 10% of initial

value

RL = 100Ω, VPP5V = 5V, CL=0,

Transition from SRC 1.5A or SRC

3.0A state to DISABLED state

0.1

0.16

0.25

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