CS47L24 datasheet(43/256 Pages) CIRRUS

43 / 256 page

CS47L24

Rev 4.1

DIGITAL CORE

The CS47L24 digital core provides extensive mixing and processing capabilities for multiple signal paths. The

configuration is highly flexible, and virtually every conceivable input/output connection can be supported between the

available processing blocks.

The digital core provides parametric equalisation (EQ) functions, dynamic range control (DRC), low-pass / high-pass

filters (LHPF), and programmable DSP capability. The DSP can support functions such as wind noise, side-tone or other

programmable filters, also dynamic range control and compression, or virtual surround sound and other audio

enhancements.

The CS47L24 supports multiple signal paths through the digital core. Stereo full-duplex sample rate conversion is

provided to allow digital audio to be routed between input (DMIC) paths, output (DAC) paths, and Digital Audio Interfaces

(AIF1, AIF2 and AIF3) operating at different sample rates and/or referenced to asynchronous clock domains.

The DSP functions are highly programmable, using application-specific control sequences. It should be noted that the

DSP configuration data is lost whenever the DCVDD power domain is removed; the DSP configuration data must be

downloaded to the CS47L24 each time the device is powered up.

The procedure for configuring the CS47L24

DSP functions is tailored to each customer’s application; please contact your

local Cirrus Logic representative for more details.

The CS47L24 incorporates two 1

kHz tone generators which can be used for ‘beep’ functions through any of the audio

signal paths. A white noise generator is incorporated, to provide ‘comfort noise’ in cases where silence (digital mute) is

not desirable.

A haptic signal generator is provided, for use with external haptic devices (e.g., mechanical vibration actuators). Two

Pulse Width Modulation (PWM) signal generators are also provided; the PWM waveforms can be modulated by an audio

source within the digital core, and can be output on a GPIO pin.

An overview of the digital core processing and mixing functions is provided in Figure 12. An overview of the external

digital interface paths is provided in Figure 13.

The control registers associated with the digital core signal paths are shown in Figure 14 through to Figure 29. The full

list of digital mixer control registers is provided in the “Register Map” section (Register R1600 through to R3000). Generic

CS47L24 Datasheet(PDF) 43 Page - Cirrus Logic