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CS47L24 Datasheet(PDF) 34 Page - Cirrus Logic |
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CS47L24 Datasheet(HTML) 34 Page - Cirrus Logic |
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34 / 256 page ![]() CS47L24 34 Rev 4.1 CONDITION DMICCLK n FREQUENCY SIGNAL PASSBAND INn_OSR = 00 1.536MHz up to 20kHz INn_OSR = 01 3.072MHz up to 20kHz INn_OSR = 10 6.144MHz up to 96kHz INn_OSR = 11 768kHz up to 8kHz Table 1 DMICCLK Frequency The microphone bias (MICBIAS) generators provide a configurable low noise output voltage, suitable for powering digital microphones. The MICBIAS generators are powered from the MICVDD supply. Powering the microphones directly from MICVDD (instead of MICBIASn) is also supported. However, the MICBIAS outputs are recommended, as these offer better noise performance and independent enable/disable control. The voltage reference for each digital microphone interface is selectable, using the INn_DMIC_SUP registers. Each interface may be referenced to MICVDD, or to the MICBIAS1 or MICBIAS2 levels. A pair of digital microphones is connected as illustrated in Figure 10. The microphones must be configured to ensure that the Left mic transmits a data bit when DMICCLK is high, and the Right mic transmits a data bit when DMICCLK is low. The CS47L24 samples the digital microphone data at the end of each DMICCLK phase. Each microphone must tri-state its data output when the other microphone is transmitting. Note that the CS47L24 provides integrated pull-down resistors on the DMICDAT1 and DMICDAT2 pins. This provides a flexible capability for interfacing with other devices. Digital Mic AGND Digital Mic VDD CLK DATA VDD CLK DATA CHAN CHAN VDD DMICDATn DMICCLKn Digital Microphone Interface Microphone Bias Generators MICVDD MICBIAS1 MICBIAS2 MICVDD supply Figure 10 Digital Microphone Input |
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