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VR4102 Datasheet(PDF) 187 Page - NEC |
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VR4102 Datasheet(HTML) 187 Page - NEC |
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187 / 701 page ![]() CHAPTER 6 EXCEPTION PROCESSING 187 6.4.13 Coprocessor Unusable Exception Cause The Coprocessor Unusable exception occurs when an attempt is made to execute a coprocessor instruction for either: a corresponding coprocessor unit that has not been marked usable (Status register bit, CU[0] = 0), or CP0 instructions, when the unit has not been marked usable (Status register bit, CU[0] = 0) and the process executes in User or Supervisor mode. This exception is not maskable. Processing The common exception vector is used for this exception, and the CPU code in the ExcCode field of the Cause register is set. The CE bit of the Cause register indicates which of the four coprocessors was referenced. The EPC register contains the address of the coprocessor instruction that causes an exception unless it is in a branch delay slot, in which case the EPC register contains the address of the preceding branch instruction and the BD bit of the Cause register is set to 1. Servicing The coprocessor unit to which an attempted reference was made is identified by the CE bit of the Cause register. One of the following processing is performed by the handler: If the process is entitled access to the coprocessor, the coprocessor is marked usable and the corresponding state is restored to the coprocessor. If the process is entitled access to the coprocessor, but the coprocessor does not exist or has failed, interpretation of the coprocessor instruction is possible. If the BD bit in the Cause register is set to 1, the branch instruction must be interpreted; then the coprocessor instruction can be emulated and execution resumed with the EPC register advanced past the coprocessor instruction. If the process is not entitled access to the coprocessor, the kernel reports UNIX SIGILL/ILL_PRIVIN_FAULT (illegal instruction/privileged instruction fault) signal to the current process, and this exception is fatal. |
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