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VR4102 Datasheet(PDF) 204 Page - NEC |
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VR4102 Datasheet(HTML) 204 Page - NEC |
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204 / 701 page ![]() CHAPTER 7 INITIALIZATION INTERFACE 204 7.1.5 HALTimer Shutdown After an RTC reset is canceled, if the HAL timer is not canceled by software within about four seconds (the HALTIMERRST bit of the PMUCNTREG register is not set to 1), the VR4102 enters reset status. Recovery from reset status occurs when the POWER pin is asserted or when a WakeUpTimer interrupt occurs. A reset by HAL timer initializes the entire internal state except for the RTC timer and the PMU. After a reset, the processor becomes the system bus master and it begins the Cold reset exception sequence to access the reset vectors in the ROM space. Since only part of the internal status is reset when a reset occurs in the VR4102, the processor should be completely initialized by software. Figure 7-5. HALTimer Shutdown Reset#(internal) ColdReset#(internal MPOWER(o) POWER(i) MRAS(0:3)#/ UCAS#/LCAS# (o) RTC (internal, 32kHz) 16MasterClock Note 16ms 350ms 4s Undefined PLL(internal) >32ms Stable oscillation POWERON(o) Stopped Stable oscillation Note MasterClock is the basic clock used in the CPU core. |
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