VR4102 datasheet(289/701 Pages) NEC

289 / 701 page

289

CHAPTER 13 CMU (CLOCK MASK UNIT)

This chapter describes the CMU register’s operations and settings.

13.1 GENERAL

As various input clocks (ctclock, i_seclk, firclock) are supplied from the CPU to each unit, a masking method

enables power consumption to be curtailed in units that are not used.

The units for which this masking method are used are the KIU, PIU, AIU, SIU, DSIU, FIR, and HSP (software

modem interface) units.

The basic functions are described below.

Control of TClock supplied to PIU, AIU, SIU, KIU, DSIU, and FIR

Control of internal clock (18.432 MHz) supplied to SIU and HSP

Control of internal clock (48 MHz) supplied to FIR

The initial value is “0”, which specifies masking. No clock is supplied unless the CPU writes “1” to CMUCLKMSK

Figure 13-1. Block Diagram of CMU and Peripheral Blocks

cscmub

piad(3:0)

piastbb

rst_gab

BCU

PMU

ctclock

i_seclk

cmuout(15:0)

tclk_siu

tclk_kiu

tclk_piu

tclk_aiu

tclk_dsiu

i_tclk

tclk_fir

seclk_siu

fclk

seclk_hsp

CMU

firclock

13.2 REGISTER SET

The CMU register is listed below.

Table 13-1. CMU Register

Address

R/W

Function

0x0B00

0060

R/W

CMUCLKMSK

CMU Clock Mask Register

This register is described in detail below.

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