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VR4102 Datasheet(PDF) 367 Page - NEC

Part # VR4102
Description  64/32-bit Microprocessor
PDF  701 Pages
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Manufacturer  NEC [NEC]
Direct Link  http://www.nec.com/
Logo NEC - NEC

VR4102 Datasheet(HTML) 367 Page - NEC

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CHAPTER 18 GIU (GENERAL PURPOSE I/O UNIT)
367
18.2.5 GIUINTSTATL (0x0B00 0108)
Bit
D15
D14
D13
D12
D11
D10
D9
D8
Name
INTS[15]
INTS[14]
INTS[13]
INTS[12]
INTS[11]
INTS[10]
INTS[9]
INTS[8]
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RTCRST
0
0
0
0
0
0
0
0
Other resets
0
0
0
0
0
0
0
0
Bit
D7
D6D5
D4D3D2
D1
D0
Name
INTS[7]
INTS[6]
INTS[5]
INTS[4]
INTS[3]
INTS[2]
INTS[1]
INTS[0]
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RTCRST
0
0
0
0
0
0
0
0
Other resets
0
0
0
0
0
0
0
0
Bit
Name
Function
D[15..0]
INTS[15..0]
Interrupt to GPIO pin. Cleared to 0 when 1 is written.
1 : Interrupt occurred
0 : No interrupt
This register indicates the interrupt status of GPIO pins. The INTS[15..0] bits correspond to the GPIO[15..0] pins.
“1” is set to the corresponding INTS bit when “1” is set to the corresponding INTE bit in the GIUINTENL register
(GPIO Interrupt Enable Register) and when the signal input to an interrupt-enabled GPIO pin meets the conditions
set via the GIUNTTYPL register (GPIO Interrupt Type (Edge or Level) Select Register) and the GIUINTALSELL
register (GPIO Interrupt Active Level Select Register).
Caution
The function of GPIO[15] is fixed as DCD# signal input.



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