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VR4102 Datasheet(PDF) 371 Page - NEC |
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VR4102 Datasheet(HTML) 371 Page - NEC |
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371 / 701 page ![]() CHAPTER 18 GIU (GENERAL PURPOSE I/O UNIT) 371 18.2.9 GIUINTTYPL (0x0B00 0110) Bit D15 D14 D13 D12 D11 D10 D9 D8 Name INTT[15] INTT[14] INTT[13] INTT[12] INTT[11] INTT[10] INTT[9] INTT[8] R/W R/W R/W R/W R/W R/W R/W R/W R/W RTCRST 0 0 0 0 0 0 0 0 Other resets 0 0 0 0 0 0 0 0 Bit D7 D6D5 D4D3D2 D1 D0 Name INTT[7] INTT[6] INTT[5] INTT[4] INTT[3] INTT[2] INTT[1] INTT[0] R/W R/W R/W R/W R/W R/W R/W R/W R/W RTCRST 0 0 0 0 0 0 0 0 Other resets 0 0 0 0 0 0 0 0 Bit Name Function D[15..0] INTT[15..0] Interrupt detection method 1 : Edge 0 : Level This register is used to set the detection method (trigger) for interrupts to GPIO pins. The INTT[15..0] bits correspond to the GPIO[15..0] pins. When “1” is set to the corresponding INTT bit, the edge detection method is used for the interrupt signal at the corresponding GPIO pin (an interrupt is triggered when the signal state changes from low to high or from high to low). The level detection method is used when “0” is set, in which case the level set to corresponding bit in the GIUINTALSELL register (GPIO Interrupt Active Level Select Register) is detected. Caution The function of GPIO[15] is fixed as DCD# signal input. |
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