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VR4102 Datasheet(PDF) 375 Page - NEC

Part # VR4102
Description  64/32-bit Microprocessor
PDF  701 Pages
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Manufacturer  NEC [NEC]
Direct Link  http://www.nec.com/
Logo NEC - NEC

VR4102 Datasheet(HTML) 375 Page - NEC

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CHAPTER 18 GIU (GENERAL PURPOSE I/O UNIT)
375
18.2.13 GIUINTHTSELL (0x0B00 0118)
Bit
D15
D14
D13
D12
D11
D10
D9
D8
Name
INTH[15]
INTH[14]
INTH[13]
INTH[12]
INTH[11]
INTH[10]
INTH[9]
INTH[8]
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RTCRST
0
0
0
0
0
0
0
0
Other resets
0
0
0
0
0
0
0
0
Bit
D7
D6D5
D4D3D2
D1
D0
Name
INTH[7]
INTH[6]
INTH[5]
INTH[4]
INTH[3]
INTH[2]
INTH[1]
INTH[0]
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RTCRST
0
0
0
0
0
0
0
0
Other resets
0
0
0
0
0
0
0
0
Bit
Name
Function
D[15..0]
INTH[15..0]
GPIO pin interrupt signal hold/through
1 : Hold
0 : Through
This register is used to set whether or not interrupt signals to the GPIO pins should be held. The INTH[15..0] bits
correspond to the GPIO[15..0] pins.
When “1” is set to the corresponding INTH bit, any interrupt signal input to the corresponding GPIO pin is held.
When “0” is set to this bit, any interrupt signal input to the corresponding GPIO pin is not held and is instead
allowed to pass through.
Any held interrupt signal is cleared when “1” is set to the corresponding bit in the GIUINTSTATL register (GPIO
Interrupt Status Register).
INTH[15..0] are not affected by GIUINTENL (interrupt enable register).
If “1” (hold) is set to the INTH bit while the interrupt enable bit is set to prohibit interrupts, any change in the pin
state is retained as change data. Therefore, an interrupt still occurs when the interrupt enable bit is again set to
enable interrupts.
Caution
The function of GPIO[15] is fixed as DCD# signal input.



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