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VR4102 Datasheet(PDF) 413 Page - NEC

Part # VR4102
Description  64/32-bit Microprocessor
PDF  701 Pages
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Manufacturer  NEC [NEC]
Direct Link  http://www.nec.com/
Logo NEC - NEC

VR4102 Datasheet(HTML) 413 Page - NEC

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CHAPTER 20 AIU (AUDIO INTERFACE UNIT)
413
20.2.4 SCNTREG (0x0B00 0168)
Bit
D15
D14
D13
D12
D11
D10
D9
D8
Name
DAENAIU
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
R/W
R/W
RR
RRR
R
R
RTCRST
0
0
0
0
0
0
0
0
Other resets
0
0
0
0
0
0
0
0
Bit
D7
D6D5
D4D3D2
D1
D0
Name
Reserved
Reserved
Reserved
Reserved
SSTATE
Reserved
SSTOPEN
Reserved
R/W
R
RR
RRR
R/W
R
RTCRST
0
0
0
0
0
0
0
0
Other resets
0
0
0
0
0
0
0
0
Bit
Name
Function
D[15]
DAENAIU
This is the speaker D/A enable bit. It controls the ON/OFF status of the Vref input to
the D/A converter’s ladder resistors.
1 : Vref ON
0 : Vref OFF
D[14:4]
Reserved
Write 0 when writing. 0 is returned after a read.
D[3]
SSTATE
Indicates speaker operation state
1 : In operation
0 : Stopped
D[2]
Reserved
Write 0 when writing. 0 is returned after a read.
D[1]
SSTOPEN
Speaker output DMA transfer 1-page boundary interrupt stop
1 : Stop DMA request at 1-page boundary
0 : Stop DMA request at 2-page boundary
D[0]
Reserved
Write 0 when writing. 0 is returned after a read.
This register is used to control the AIU’s speaker block.
DAENAIU bit controls the connection of DVDD and Vref input to ladder type resistors in the D/A converter. Setting
this bit to 0 (OFF) allows low power consumption when not using the D/A converter. When using D/A converter, this
bit must be set following the sequence described in 20.3.
The contents of SSTATE bit is valid only when AIUSEN bit of SEQREG is set to 1.



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