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VR4102 Datasheet(PDF) 438 Page - NEC |
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VR4102 Datasheet(HTML) 438 Page - NEC |
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438 / 701 page ![]() CHAPTER 22 DSIU (DEBUG SERIAL INTERFACE UNIT) 438 22.2.3 ASIM00REG (0x0B00 01A4) Bit D15 D14 D13 D12 D11 D10 D9 D8 Name Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved R/W R RR RRR R R RTCRST 0 0 0 0 0 0 0 0 Other resets 0 0 0 0 0 0 0 0 Bit D7 D6D5 D4D3D2 D1 D0 Name Reserved RXE0 PS0[1] PS0[0] CL0 SL0 Reserved Reserved R/W R R/W R/W R/W R/W R/W R R RTCRST 1 0 0 0 0 0 0 0 Other resets 1 0 0 0 0 0 0 0 Bit Name Function D[15:8] Reserved Write 0 when writing. 0 is returned after a read. D[7] Reserved Write 1 when writing. 1 is returned after a read. D[6] RXE0 Debug serial reception enable 1 : Enable 0 : Prohibit D[5:4] PS0[1:0] Debug serial parity select 11 : Even parity 10 : Odd parity 01 : Zero parity bits during transmit No parity during receive 00 : No parity. Set to 00 for extended-bit operations D[3] CL0 Debug serial character length setting 1 : 8 bits 0 : 7 bits D[2] SL0 Debug serial stop bit setting 1 : 2 bits 0 : 1 bit D[1:0] Reserved Write 0 when writing. 0 is returned after a read. This register is used to make various serial communication settings for debugging. The setting of RXE0 bit is reflected on the output from DRTS# pin. 0 is output when this bit is set to 1 (reception enable), and 1 is output when this bit is set to 0 (reception prohibit). If this register is changed during transmission or reception of serial data for debugging, the DSIU’s operations cannot be guaranteed. |
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