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VR4102 Datasheet(PDF) 484 Page - NEC |
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VR4102 Datasheet(HTML) 484 Page - NEC |
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484 / 701 page ![]() CHAPTER 25 HSP (MODEM INTERFACE UNIT) 484 25.2.1 HSP Initialize Register (1) HSPINIT (0x0C00 0020) Bit D15 D14 D13 D12 D11 D10 D9 D8 Name Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved R/W R RR RRR R R RTCRST 0 0 0 0 0 0 0 0 Other resets 0 0 0 0 0 0 0 0 Bit D7 D6D5 D4D3D2 D1 D0 Name Reserved Reserved Reserved OPD AFESEL BYTE BSC HSPRST R/W R R R R/W R/W R/W R/W R/W RTCRST 0 0 0 0 0 0 0 0 Other resets 0 0 0 0 0 0 0 0 Bit Name Function D[15:5] Reserved Write 0 when writing. 0 is returned after read. D[4] OPD Power-down CODEC (indicates OPD# pin’s state) 1 : High level 0 : Low level D[3] AFESEL CODEC interface mode switch 1 : ST7546, STLC7546(SGS), T7525(AT) 0 : TLC320C44, TLC320AC01/02(TI) D[2] BYTE HSP data bus width setting 1 : 8 bits 0 : 16 bits D[1] BSC CODEC interface control 1 : Normal 0 : Initial value D[0] HSPRST HSP unit reset (same as hardware reset) 1 : Reset 0 : Do not reset This register is used to control the HSP. BSC bit is used to control the CODEC interface. This bit must be set to 1 when using the HSP. The hardware reset and the reset by the HSPRST bit result the same function. |
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