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VR4102 Datasheet(PDF) 573 Page - NEC

Part # VR4102
Description  64/32-bit Microprocessor
PDF  701 Pages
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Manufacturer  NEC [NEC]
Direct Link  http://www.nec.com/
Logo NEC - NEC

VR4102 Datasheet(HTML) 573 Page - NEC

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CHAPTER 27 CPU INSTRUCTION SET DETAILS
573
DMULT
Doubleword Multiply
DMULT
rs
SPECIAL
0 0 0 0 0 0
rt
0
0 0
0 0 0 0
0 0 0 0
31
26 25
21 20
16 15
0
65
5
10
DMULT
0 1 1 1 0 0
65
6
Format:
DMULT rs, rt
Description:
The contents of general registers
rs and rt are multiplied, treating both operands as 2’s complement values. No
integer overflow exception occurs under any circumstances.
When the operation completes, the low-order word of the double result is loaded into special register
LO, and the
high-order word of the double result is loaded into special register
HI.
If either of the two preceding instructions is MFHI or MFLO, the results of these instructions are undefined.
Correct operation requires separating reads of
HI or LO from writes by a minimum of two other instructions.
This operation is only defined for the VR4102 operating in 64-bit mode. Execution of this instruction in 32-bit user
or supervisor mode causes a reserved instruction exception.
Operation:
64
T-2:
LO
<- undefined
HI
<- undefined
T-1:
LO
<- undefined
HI
<- undefined
T:
t
<- GPR [rs] * GPR [rt]
LO
<- t63..0
HI
<- t127..64
Exceptions:
Reserved instruction exception (VR4102 in 32-bit user mode, VR4102 in 32-bit supervisor mode)



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