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VR4102 Datasheet(PDF) 626 Page - NEC |
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VR4102 Datasheet(HTML) 626 Page - NEC |
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626 / 701 page ![]() CHAPTER 27 CPU INSTRUCTION SET DETAILS 626 SDL Store Doubleword Left SDL base SDL 1 0 1 1 0 0 rt offset 31 26 25 21 20 16 15 0 65 5 16 Format: SDL rt, offset (base) Description: This instruction can be used with the SDR instruction to store the contents of a register into eight consecutive bytes of memory, when the bytes cross a doubleword boundary. SDL stores the left portion of the register into the appropriate part of the high-order doubleword of memory; SDR stores the right portion of the register into the appropriate part of the low-order doubleword. The SDL instruction adds its sign-extended 16-bit offset to the contents of general register base to form a virtual address which may specify an arbitrary byte. It alters only the word in memory which contains that byte. From one to four bytes will be stored, depending on the starting byte specified. Conceptually, it starts at the most-significant byte of the register and copies it to the specified byte in memory; then it copies bytes from register to memory until it reaches the low-order byte of the word in memory. No address error exceptions due to alignment are possible. address 8 address 0 memory 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 A B C D E F G H before after $24 register SDL $24, 8 ($0) address 8 address 0 15 14 13 12 11 10 9 A 7 6 5 4 3 2 1 0 |
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