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VR4102 Datasheet(PDF) 627 Page - NEC |
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VR4102 Datasheet(HTML) 627 Page - NEC |
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627 / 701 page  CHAPTER 27 CPU INSTRUCTION SET DETAILS 627 SDL Store Doubleword Left SDL (Continued) This operation is only defined for the VR4102 operating in 64-bit mode. Execution of this instruction in 32-bit user or supervisor mode causes a reserved instruction exception. Operation: 64 T: vAddr <- ((offset15) 48 || offset15...0) + GPR [base] (pAddr, uncached) <- AddressTranslation (vAddr, DATA) pAddr <- pAddrPSIZE - 1...3 || (pAddr2...0 xor ReverseEndian 3) if BigEndianMem = 0 then pAddr <- pAddrPSIZE - 1...3 || 0 3 endif byte <- vAddr2...0 xor BigEndianCPU 3 data <- 0 56 – 8 * byte || GPR [rt] 63...56 – 8 * byte Storememory (uncached, byte, data, pAddr, vAddr, DATA) |
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