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VR4102 Datasheet(PDF) 630 Page - NEC |
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VR4102 Datasheet(HTML) 630 Page - NEC |
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630 / 701 page  CHAPTER 27 CPU INSTRUCTION SET DETAILS 630 SDR Store Doubleword Right SDR (Continued) This operation is only defined for the VR4102 operating in 64-bit mode. Execution of this instruction in 32-bit user or supervisor mode causes a reserved instruction exception. Operation: 64 T: vAddr <- ((offset15) 48 || offset 15...0) + GPR [base] (pAddr, uncached) <- AddressTranslation (vAddr, DATA) pAddr <- pAddrPSIZE - 1...3 || (pAddr2...0 xor ReverseEndian 3) if BigEndianMem = 0 then pAddr <- pAddrPSIZE - 1...3 || 0 3 endif byte <- vAddr2...0 xor BigEndianCPU 3 data <- GPR [rt]63 – 8 * byte || 0 8 * byte StoreMemory (uncached, DOUBLEWORD-byte, data, pAddr, vAddr, DATA) |
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