VR4102 datasheet(629/701 Pages) NEC

629 / 701 page

CHAPTER 27 CPU INSTRUCTION SET DETAILS

629

SDR

Store Doubleword Right

SDR

base

SDR

1 0 1 1 0 1

offset

26 25

21 20

16 15

Format:

SDR rt, offset (base)

Description:

This instruction can be used with the SDL instruction to store the contents of a register into eight consecutive

bytes of memory, when the bytes cross a boundary between two doublewords. SDR stores the right portion of

the register into the appropriate part of the low-order doubleword; SDL stores the left portion of the register into

the appropriate part of the low-order doubleword of memory.

The SDR instruction adds its sign-extended 16-bit offset to the contents of general register base to form a virtual

address which may specify an arbitrary byte. It alters only the word in memory which contains that byte. From

one to eight bytes will be stored, depending on the starting byte specified.

Conceptually, it starts at the least-significant (rightmost) byte of the register and copies it to the specified byte in

memory; then it copies bytes from register to memory until it reaches the high-order byte of the word in memory.

No address error exceptions due to alignment are possible.

address 8

address 0

memory

15 14 13 12 11 10

before

after

$24

SDR $24, 1 ($0)

address 8

address 0

15 14 13 12 11 10

VR4102 Datasheet(PDF) 629 Page - NEC