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VR4102 Datasheet(PDF) 681 Page - NEC

Part # VR4102
Description  64/32-bit Microprocessor
PDF  701 Pages
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Manufacturer  NEC [NEC]
Direct Link  http://www.nec.com/
Logo NEC - NEC

VR4102 Datasheet(HTML) 681 Page - NEC

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CHAPTER 28 VR4102 COPROCESSOR 0 HAZARDS
681
Table 28-2 indicates examples of calculation.
Table 28-2. Calculation Example of CP0 Hazard and the Number of Instructions Inserted
Destination
Source
Contending
internal
resource
Number of
instructions
inserted
Formula
TLBWR/TLBWI
TLBP
TLB Entry
2
5 - (2 + 1)
TLBWR/TLBWI
Load or Store using newly modified TLB
TLB Entry
1
5 - (3 + 1)
TLBWR/TLBWI
Instruction fetch using newly modified TLB
TLB Entry
2
5 - (2 + 1)
MTC0, Status [CU]
Coprocessor instruction which requires the
setting of CU
Status [CU]
2
5 - (2 + 1)
TLBR
MFC0 EntryHi
EntryHi
1
5 - (3 + 1)
MTC0 EntryLo0
TLBWR/TLBWI
EntryLo0
2
5 - (2 + 1)
TLBP
MFC0 Index
Index
2
6 - (3 + 1)
MTC0 EntryHi
TLBP
EntryHi
2
5 - (2 + 1)
MTC0 EPC
ERET
EPC
2
5 - (2 + 1)
MTC0 Status
ERET
Status
2
5 - (2 + 1)
MTC0 Status [IE]
Note
Instruction which causes an interrupt
Status [IE]
2
5 - (2 + 1)
Note
The number of hazards is undefined if the instruction execution sequence is changed by exceptions. In
such a case, the minimum number of hazards until the IE bit value is confirmed may be the same as the
maximum number of hazards until an interrupt request occurs which is pending and enabled.



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