ADPD188GG

Data Sheet

Rev. B | Page 6 of 61

Parameter

Test Conditions/Comments

Min

Typ

Max

Unit

SYSTEM PERFORMANCE

Total Output Noise Floor

Normal mode; per pulse; per channel; no LED; photodiode

25 kΩ; referred to ADC input

1.0

LSB rms

25 kΩ; referred to peak input signal for 2 µs LED pulse

4.6

nA rms

25 kΩ; referred to peak input signal for 3 µs LED pulse

3.3

nA rms

25 kΩ; saturation signal-to-noise ratio (SNR) per pulse per

78.3

dB

50 kΩ; referred to ADC input

1.1

LSB rms

50 kΩ; referred to peak input signal for 2 µs LED pulse

2.5

nA rms

50 kΩ; referred to peak input signal for 3 µs LED pulse

1.8

nA rms

77.4

dB

100 kΩ; referred to ADC input

1.2

LSB rms

100 kΩ; referred to peak input signal for 2 µs LED pulse

1.4

nA rms

100 kΩ; referred to peak input signal for 3 µs LED pulse

0.98

nA rms

76.7

dB

200 kΩ; referred to ADC input

1.4

LSB rms

200 kΩ; referred to peak input signal for 2 µs LED pulse

0.81

nA rms

200 kΩ; referred to peak input signal for 3 µs LED pulse

0.57

nA rms

75.3

dB

1

The R_IN value can be ignored for current source inputs or for PD inputs. This value is important for calculating correct voltages for voltage inputs through a resistor.

2

This saturation level applies to the ADC only and, therefore, includes only the pulsed signal. Any nonpulsatile signal is removed prior to the ADC stage.

3

ADC resolution is listed per pulse. If using multiple pulses, divide by the number of pulses.

4

This saturation level applies to the full signal path and, therefore, includes both the ambient signal and the pulsed signal.

5

The noise term of the saturation SNR value refers to the receive noise only and does not include photon shot noise or any noise on the LED signal itself.

DIGITAL SPECIFICATIONS

VDD1 = VDD2 = 1.7 V to 1.9 V, unless otherwise noted.

Table 3.

Parameter

Symbol

Test Conditions/Comments

Min

Typ

Max

Unit

LOGIC INPUTS

Input Voltage Level

High

GPIOx, SCLK, MOSI, CS

0.7 × VDDx

VDDx

V

High

SCL, SDA

0.7 × VDDx

3.6

Low

0.3 × VDDx

V

Input Current Level

High

−10

+10

µA

Low

−10

+10

µA

Input Capacitance

10

pF

LOGIC OUTPUTS

Output Voltage Level

GPIOx, MISO

High

2 mA high level output current

VDDx − 0.5

V

Low

2 mA low level output current

0.5

V

Output Voltage Level

SDA

Low

2 mA low level output current

0.2 × VDDx

V

Output Current Level

SDA

Low

6

mA