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ADPD188GG Datasheet(PDF) 1 Page - Analog Devices |
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ADPD188GG Datasheet(HTML) 1 Page - Analog Devices |
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1 / 61 page ![]() Integrated Optical Module with Ambient Light Rejection and Two LEDs Data Sheet ADPD188GG Rev. B Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibilityisassumedbyAnalogDevicesforitsuse,norforanyinfringementsofpatentsorother rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2018–2020 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com FEATURES 3.8 mm × 5.0 mm × 0.9 mm module with integrated optical components 2 green LEDs, 2 PDs with IR cut filter 2 external sensor inputs 3, 370 mA LED drivers 20-bit burst accumulator enabling 20 bits per sample period On-board sample to sample accumulator enabling up to 27 bits per data read Custom optical package made to work under a glass window Optimized SNR for signal limited cases I2C or SPI communications APPLICATIONS Optical heart rate monitoring Reflective PPG measurement CNIBP measurement GENERAL DESCRIPTION The ADPD188GG is a complete photometric system designed to measure optical signals from ambient light and from synchronous reflected light emitting diode (LED) pulses. Synchronous measure- ment offers best-in-class rejection of ambient light interference, both dc and ac. The module integrates a highly efficient photo- metric front end, two LEDs, and two photodiode (PD). All of these items are housed in a custom package that prevents light from going directly from the LED to the photodiode without first entering the subject. The front end of the application specific integrated circuit (ASIC) consists of a control block, a 14-bit analog-to-digital converter (ADC) with a 20-bit burst accumulator, and three flexible, independently configurable LED drivers. The control circuitry includes flexible LED signaling and synchronous detection. The analog front end (AFE) features best-in-class rejection of signal offset and corruption due to modulated interference commonly caused by ambient light. The data output and functional configuration occur over a 1.8 V I2C interface or a serial peripheral interface (SPI) port. FUNCTIONAL BLOCK DIAGRAM TIME SLOT A TIME SLOT B DIGITAL INTERFACE AND CONTROL SDA SCL GPIO0 GPIO1 DGND AGND VREF 1µF VDD1 VDD2 ADPD188GG 14-BIT ADC LED2 DRIVER VLED1 EXT_IN1 LED2 GREEN TIA_VREF TIA_VREF DATA DATA LGND BPF ±1 INTEGRATOR BPF ±1 INTEGRATOR LED3 DRIVER LED1 DRIVER LED3 NOTES 1. DNC = DO NOT CONNECT. DO NOT CONNECT TO THIS PIN WHEN USING INTERNAL LEDs. LED1/DNC CH2 TIA_VREF TIA_VREF BPF ±1 INTEGRATOR BPF ±1 INTEGRATOR EXT_IN2 PD3 PD4 PDC PDC CS SCLK MOSI MISO PDET1 PDET2 PD2 PD1 CH3 CH4 CH1 Figure 1. |
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