ADPD1081 datasheet(38/74 Pages) AD

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ADPD1080/ADPD1081

Data Sheet

Rev. C | Page 38 of 74

ability to drive up to four separate LEDs per sample period.

In such a case, the ADPD1080/ADPD1081 operate at 2× the

sampling rate, and the LED settings can be reconfigured

during the sleep period between samples. If identical LED

settings (current and timing) are used for the LEDs being

muxed, up to four LEDs can be sampled per sampling period

without host intervention. An example of this configuration is

shown in Figure 45.

The fS/2 timing signal always starts in an active low state when

the device switches from standby mode to normal operating

mode and transitions to a high state at the completion of the

first sample.

VLED

ADPD1080/

ADPD1081

LEDx

GPIOx

Figure 45. Example Using the fS/2 Timing Signal

Logic 0 Output

Setting Register 0x0B, Bits[12:8] or Bits[4:0] = 0x10 configures

the respective pin to provide a Logic 0 output.

Logic 1 Output

Setting Register 0x0B, Bits[12:8] or Bits[4:0] = 0x11 configures

the respective pin to provide a Logic 1 output.

32 kHz Oscillator Output

Setting Register 0x0B, Bits[12:8] or Bits[4:0] = 0x13 configures

the respective pin to provide a copy of the on-board 32 kHz

oscillator.

CALCULATING CURRENT CONSUMPTION

The current consumption of the ADPD1080/ADPD1081

depends on the user selected operating configuration, as

determined by the following equations.

Total Power Consumption

To calculate the total power consumption, use Equation 4.

Total Power = IVDD_AVG × VDD + ILEDA_AVG × VLEDA +

ILEDB_AVG × VLEDB

(4)

Average VDD Supply Current

To calculate the average VDD supply current, use Equation 5.

IVDD_AVG = DR × ((IAFE_A × tSLOTA) + (IAFE_B × tSLOTB) +

QPROC_X) + IVDD_STANDBY

(5)

where:

DR is the data rate in Hz.

IVDD_STANDBY = 0.2 µA.

QPROC_X is an average charge associated with a processing time.

When only Time Slot A is enabled,

QPROC_A (C) = 0.35 × 10−6

When only Time Slot B is enabled,

QPROC_B (C) = 0.24 × 10−6

When Time Slot A and Time Slot B are enabled,

QPROC_AB (C) = 0.40 × 10−6

IAFE_x (A) = 3.0 × 10−3 + (1.5 × 10−3 × NUM_CHANNELS) +

(4.6 × 10−3 × ILEDX_PK/SCALE_X)

(6)

tSLOTx (sec) = LEDx_OFFSET + LEDx_PERIOD ×

PULSE_COUNT

(7)

where:

NUM_CHANNELS is the number of active channels.

ILEDX_PK is the peak LED current, expressed in amps, for whichever

LED is enabled in that particular time slot.

SCALE_X is the scale factor for the LED current drive determined

by Bit 13 of the ILEDx_COARSE registers, Register 0x22,

LEDx_OFFSET is the pulse start time offset expressed in

seconds.

LEDx_PERIOD is the pulse period expressed in seconds.

PULSE_COUNT is the number of pulses.

If either Time Slot A or Time Slot B are disabled, IAFE_x = 0 for that

respective time slot. Additionally, if operating in TIA ADC mode,

set Register 0x3C, Bits[8:3] = 010010 to achieve power savings.

This setting disables the BPFs that are bypassed in TIA ADC

mode, changing the AFE power contribution calculation to

IAFE_x (mA) = 3.0 × 10−3 + (1.0 × 10−3 × NUM_CHANNELS) +

(4.6 × 10−3 × ILEDX_PK/SCALE_X)

(8)

Average VLEDA Supply Current

To calculate the average VLEDA supply current, use Equation 9.

ILED_AVG_A = SLOTA_LED_WIDTH × ILEDA_PK × DR ×

PULSE_COUNT

(9)

where:

SLOTA_LED_WIDTH is the LED pulse width expressed in

seconds.

ILEDA_PK is the peak current, expressed in amps, for whichever

LED is selected for Time Slot A.

Average VLEDB Supply Current

To calculate the average VLEDB supply current, use Equation 10.

ILED_AVG_B = SLOTB_LED_WIDTH × ILEDB_PK × DR ×

PULSE_COUNT

(10)

where:

SLOTB_LED_WIDTH is the LED pulse width expressed in

seconds.

ILEDB_PK is the peak current, expressed in amps, for whichever

LED is selected for Time Slot B.

ADPD1081 Datasheet(PDF) 38 Page - Analog Devices

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