ADPD1081 datasheet(65/74 Pages) AD

65 / 74 page

Data Sheet

ADPD1080/ADPD1081

Rev. C | Page 65 of 74

Address

Data Bit

Default

Value

Access

Name

Description

[13:0]

0x0

R/W

BG_THRESH_B

The background threshold for Time Slot B that is compared

against the ADC result during the subtract cycles during float

mode. If the ADC result exceeds the value in this register,

BG_COUNT_B is incremented.

0x3E

[15:14]

0x0

R/W

FLT_LED_SELECT_A

Time Slot A LED selection for float LED mode.

0: no LED selected.

1: LED1.

2: LED2.

3: LED3.

R/W

Reserved

Write 0x0.

[12:8]

0x03

R/W

FLT_LED_WIDTH_A

Time Slot A LED pulse width for LED float mode in 1 µs steps.

[7:0]

0x20

R/W

FLT_LED_OFFSET_A

Time to first LED pulse in float mode for Time Slot A.

0x3F

[15:14]

0x0

R/W

FLT_LED_SELECT_B

Time Slot B LED selection for float LED mode.

0: no LED selected.

1: LED1.

2: LED2.

3: LED3.

R/W

Reserved

Write 0x0.

[12:8]

0x03

R/W

FLT_LED_WIDTH_B

Time Slot B LED pulse width for LED float mode in 1 µs steps.

[7:0]

0x20

R/W

FLT_LED_OFFSET_B

Time to first LED pulse in Float mode for Time Slot A.

0x58

[15:12]

0x0

R/W

Reserved

Reserved.

[11:10]

0x0

R/W

FLT_MATH34_B

Time Slot B control for adding and subtracting Sample 3 and

Sample 4 in a 4 pulse sequence (or any multiple of 4 pulses, for

example, Sample 15 and Sample 16 in a 16-pulse sequence).

00: add third and fourth.

01: add third and subtract fourth.

10: subtract third and add fourth.

11: subtract third and fourth.

[9:8]

0x0

R/W

FLT_MATH34_A

Time Slot A control for adding and subtracting Sample 3 and

Sample 4 in a 4 pulse sequence (or any multiple of 4 pulses, for

example, Sample 15 and Sample 16 in a 16-pulse sequence).

00: add third and fourth.

01: add third and subtract fourth.

10: subtract third and add fourth.

11: subtract third and fourth.

0x0

R/W

ENA_INT_AS_BUF

Set to 1 to enable the configuration of the integrator as a buffer in

TIA ADC mode.

[6:5]

0x0

R/W

FLT_MATH12_B

Time Slot B control for adding and subtracting Sample 1 and

Sample 2 in a 4 pulse sequence (or any multiple of 4 pulses, for

example, Sample 13 and Sample 14 in a 16-pulse sequence).

00: add first and second.

01: add first and subtract second.

10: subtract first and add second.

11: subtract first and second.

[4:3]

0x0

R/W

Reserved

Write 0x0.

[2:1]

0x0

R/W

FLT_MATH12_A

Time Slot A control for adding and subtracting Sample 1 and

Sample 2 in a 4 pulse sequence (or any multiple of 4 pulses, for

example, Sample 13 and Sample 14 in a 16-pulse sequence).

00: add first and second.

01: add first and subtract second.

10: subtract first and add second.

11: subtract first and second.

0x0

R/W

Reserved

Write 0x0.

ADPD1081 Datasheet(PDF) 65 Page - Analog Devices

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