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ADPD1081 Datasheet(PDF) 44 Page - Analog Devices

Part # ADPD1081
Description  Photometric Front Ends
PDF  74 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADPD1081 Datasheet(HTML) 44 Page - Analog Devices

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ADPD1080/ADPD1081
Data Sheet
Rev. C | Page 44 of 74
If this minimum value is above 0 LSB, the TIA is not saturated.
However, take care, because even if the result is not 0 LSB,
operating the device near saturation can quickly result in
saturation if light conditions change. A safe operating region is
typically at ¾ full scale and lower. Use Table 29 to determine
how the input codes map to ADC levels on a per channel per
pulse basis. These codes are not the same as in normal mode
because the BPF and integrator are not unity-gain elements.
Measuring PCB Parasitic Input Resistance
During the process of mounting the ADPD1080/ADPD1081,
undesired resistance can develop on the inputs through assembly
errors or debris on the PCB. These resistances can form between
the anode and cathode, or between the anode and some other
supply or ground. In normal operation, the ambient rejection
feature of the ADPD1080/ADPD1081 masks the primary effects
of these resistances, making it difficult to detect them. However,
even at 1 MΩ to 10 MΩ, such resistance can affect performance
significantly through added noise or decreased dynamic range.
TIA ADC mode can screen for these assembly issues.
Measuring Shunt Resistance on the Photodiode
A shunt resistor across the photodiode does not generally affect
the output level of the device in operation because the effective
impedance of the TIA is low, especially if the photodiode is held
to 0 V in operation. However, such resistance can add noise to the
system, degrading performance. The best way to detect photodiode
leakage, also called photodiode shunt resistance, is to place the
device in TIA ADC mode in the dark and vary the operation
mode cathode voltage. Setting the cathode to 1.3 V places 0 V
across the photodiode because the anode is always at 1.3 V
while in operation. Setting the cathode to 1.8 V places 0.5 V
across the photodiode. Using the register settings in Table 3 to
control the cathode voltage, measure the TIA ADC value at
both voltages. Next, divide the voltage difference of 0.5 V by the
difference of the ADC result after converting it to a current. This
result is the approximate shunt resistance. Values greater than
10 MΩ may be difficult to measure, but this method is useful in
identifying gross failures.
Measuring TIA Input Shunt Resistance
A resistance to develop between the TIA input and another
supply or ground on the PCB is an example of another problem
that can occur. These resistances can force the TIA into saturation
prematurely. This premature saturation, in turn, takes away
dynamic range from the device in operation and adds a Johnson
noise component to the input. To measure these resistances, place
the device in TIA ADC mode in the dark and start by measuring
the TIA ADC offset level with the photodiode inputs disconnected
(Register 0x14, Bits[11:8] = 0 or Register 0x14, Bits[7:4] = 0).
From this, subtract the value of TIA ADC mode with the
darkened photodiode connected and convert the difference into
a current. If the value is positive, and the ADC signal decreased,
the resistance is to a voltage higher than 1.3 V, such as VDD.
Current entering the TIA causes the output to drop. If the
output difference is negative due to an increase of codes at the
ADC, current is being pulled out of the TIA, and there is a
shunt resistance to a lower potential than 1.3 V, such as
ground.
Table 29. Analog Specifications for TIA ADC Mode
Parameter
Test Conditions/Comments
Typ
Unit
TIA ADC Saturation Levels
Values expressed per channel, per sample
25 kΩ gain
38.32
µA
50 kΩ gain
19.16
µA
100 kΩ gain
9.58
µA
200 kΩ gain
4.79
µA
TIA Linear Range
25 kΩ gain
42.8
µA
50 kΩ gain
21.4
µA
100 kΩ gain
10.7
µA
200 kΩ gain
5.4
µA
TIA ADC Resolution
Values expressed per channel, per sample; TIA feedback resistor
25 kΩ
2.92
nA/LSB
50 kΩ
1.5
nA/LSB
100 kΩ
0.73
nA/LSB
200 kΩ
0.37
nA/LSB
Output Without Input Photocurrent
ADC offset (Register 0x18 to Register 0x21) = 0x0
13,000
LSB



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