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ADPD1081 Datasheet(PDF) 19 Page - Analog Devices |
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ADPD1081 Datasheet(HTML) 19 Page - Analog Devices |
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19 / 74 page ![]() Data Sheet ADPD1080/ADPD1081 Rev. C | Page 19 of 74 THEORY OF OPERATION INTRODUCTION The ADPD1080/ADPD1081 operate as a complete optical transceiver stimulating up to three LEDs and measuring the return signal on up to two separate current inputs. The core consists of a photometric front end coupled with an ADC, digital block, and three independent LED drivers. The core circuitry stimulates the LEDs and measures the return in the analog block through one to eight photodiode inputs, storing the results in discrete data locations. The two inputs can drive four simultaneous input channels. Data can be read directly by a register or through a first in, first out (FIFO) method. This highly integrated system includes an analog signal processing block, digital signal processing block, an I2C communication interface on the ADPD1080 or an SPI port on the ADPD1081, and programmable pulsed LED current sources. The LED driver is a current sink and is agnostic to the LED supply voltage and the LED type. The photodiode (PDx) inputs can accommodate any photodiode with an input capacitance of less than 100 pF. The ADPD1080/ADPD1081 produces a high SNR for relatively low LED power while greatly reducing the effect of ambient light on the measured signal. DUAL TIME SLOT OPERATION The ADPD1080/ADPD1081 operate in two independent time slots, Time Slot A and Time Slot B, that operate sequentially. The entire signal path from LED stimulation to data capture and processing executes during each time slot. Each time slot has a separate datapath that uses independent settings for the LED driver, AFE setup, and the resulting data. Time Slot A and Time Slot B operate in sequence for every sampling period, as shown in Figure 17. The timing parameters for Time Slot A and Time Slot B are defined as follows: tA (µs) = SLOTA_LED_OFFSET + nA × SLOTA_PERIOD where nA is the number of pulses for Time Slot A (Register 0x31, Bits[15:8]). tB (µs) = SLOTB_LED_OFFSET + nB × SLOTB_PERIOD where nB is the number of pulses for Time Slot B (Register 0x36, Bits[15:8]). Calculate the LED period using the following equation: LED_PERIOD, minimum = 2 × SLOTx_AFE_WIDTH + 11 t1 and t2 are fixed and based on the computation time for each slot. If a slot is not in use, these times do not add to the total active time. Table 15 defines the values for these LED and sampling time parameters. ACTIVE tA t1 tB t2 SLEEP TIME SLOT A TIME SLOT B ACTIVE 1/fSAMPLE nA PULSES nB PULSES Figure 17. Time Slot Timing Diagram (fSAMPLE is the sampling frequency (Register 0x12, Bits[15:0]).) Table 15. LED Timing and Sample Timing Parameters Parameter Register Bits Test Conditions/Comments Min Typ Max Unit SLOTA_LED_OFFSET1 0x30 [7:0] Delay from power-up to LEDA rising edge 23 63 µs SLOTB_LED_OFFSET1 0x35 [7:0] Delay from power-up to LEDB rising edge 23 63 µs SLOTA_PERIOD2 0x31 [7:0] Time between LED pulses in Time Slot A; SLOTx_AFE_WIDTH = 4 µs 19 63 µs SLOTB_PERIOD2 0x36 [7:0] Time between LED pulses in Time Slot B; SLOTx_AFE_WIDTH = 4 µs 19 63 µs t1 N/A N/A Compute time for Time Slot A 68 µs t2 N/A N/A Compute time for Time Slot B 20 µs tSLEEP N/A N/A Sleep time between sample periods 222 µs 1 Setting the SLOTx_LED_OFFSET less than the specified minimum value can cause failure of ambient light rejection for large photodiodes. 2 Setting the SLOTx_LED_PERIOD less than the specified minimum value can cause invalid data captures. |
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