ADPD1081 datasheet(41/74 Pages) AD

41 / 74 page

Data Sheet

ADPD1080/ADPD1081

Rev. C | Page 41 of 74

Hex

Addr.

Data

Bit(s)

Bit Name

Description

0x58

[11:10]

FLT_MATH34_B

Time Slot B control for adding and subtracting Sample 3 and Sample 4 in a four-pulse sequence (or

any multiple of four pulses, for example, Sample 15 and Sample 16 in a 16-pulse sequence).

00: add third and fourth.

01: add third and subtract fourth.

10: subtract third and add fourth.

11: subtract third and fourth.

[9:8]

FLT_MATH34_A

Time Slot A control for adding and subtracting Sample 3 and Sample 4 in a four-pulse sequence

(or any multiple of four pulses, for example, Sample 15 and Sample 16 in a 16-pulse sequence).

00: add third and fourth.

01: add third and subtract fourth.

10: subtract third and add fourth.

11: subtract third and fourth.

[6:5]

FLT_MATH12_B

Time Slot B control for adding and subtracting Sample 1 and Sample 2 in a four-pulse sequence (or

any multiple of four pulses, for example, Sample 13 and Sample 14 in a 16-pulse sequence).

00: add first and second.

01: add first and subtract second.

10: subtract first and add second.

11: subtract first and second.

[2:1]

FLT_MATH12_A

Time Slot A control for adding and subtracting Sample 1 and Sample 2 in a four-pulse sequence

(or any multiple of four pulses, for example, Sample 13 and Sample 14 in a 16-pulse sequence).

00: add first and second.

01: add first and subtract second.

10: subtract first and add second.

11: subtract first and second.

OPTIMIZING POWER BY DISABLING UNUSED

CHANNELS AND AMPLIFIERS

Single-Channel AFE Mode

When using a single photodiode in an application, with that

photodiode connected to a single AFE channel (either Channel 1

or Channel 2), the ADPD1080/ADPD1081 have an option to

power down the unused channels, placing the device in single

AFE channel mode. Because three of the four AFE channels are

off in this mode, the power consumption is reduced considerably.

When only Channel 1 is used, disable Channel 2, Channel 3,

and Channel 4 by writing 0x7 to Register 0x3C, Bits[8:6]. If

only Channel 2 is used, disable Channel 1 by writing 0x7 to

by writing 0x7 to Register 0x37, Bits[15:13].

Dual-Channel AFE Mode

In situations where two of the four channels are in use, the

other two channels can be disabled. Enable Channel 1 and

Channel 2 (with Channel 3 and Channel 4 disabled) by writing

0x7 to Register 0x37, Bits[15:13]. Operate Channel 3 and Channel

4 in dual channel mode (with Channel 1 and Channel 2

disabled) by writing 0x7 to both Register 0x3C, Bits[5:3] and

Three-channel mode can also be achieved with the appropriate

settings. See Table 26 for the settings required to power down

different combinations of channels. Refer to the Time Slot

Switch section to determine the different combinations of the

PDx inputs and enabled channels required to optimize the

system configuration for maximum SNR and lowest power.

Powering Down Individual Amplifiers for Additional

Power Savings

Each channel includes a TIA, a BPF, and an integrator which

can also be configured as a buffer (see Figure 47).Options are

built into the devices to power down individual amplifiers in the

signal path. For example, in TIA ADC mode, the BPF is bypassed

but left powered up by default. The BPF can be disabled

completely, which saves 1/3 of the power dissipated by the AFE

during the sampling phase. See the descriptions for Register 0x3C

and Register 0x37 in Table 38 for information on how to disable

the individual amplifiers.

TIA

VBIAS

BPF

±1 INTEGRATOR

Figure 47. TIA/BPF/Integrator Block Diagram

It is important to leave any unused input channels floating for

proper device operation.

ADPD1081 Datasheet(PDF) 41 Page - Analog Devices

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