ADF4372 datasheet(17/47 Pages) AD

17 / 47 page

Data Sheet

ADF4372

Rev. 0 | Page 17 of 47

VCO Band Selection

The VCO_BAND_DIV bits (programmed in Address 0x30) and

fPFD are used to generate the VCO band selection clock

as follows:

PFD

BSC

VCO BAND DIV

(14)

The calculated time must be less than or equal to 2.4 MHz.

16 clock cycles are required for one VCO core and band

calibration step and the total band selection process takes

11 steps, resulting in the following equation:

× 16

PFD

VCO BAND DIV

(15)

The minimum value for VCO_BAND_DIV is 1 and the

maximum value is 255.

ALC

Use the ALC function to choose the correct bias current in the

ADF4372 VCO core. The duration required for VCO bias

voltage to settle for each step is set by the following equation:

1024

PFD

VCO ALC TIMEOUT

TIMEOUT

×+

(16)

where:

VCO_ALC_TIMEOUT and TIMEOUT are programmed in

Address 0x34, Address 0x32, and Address 0x31.

The calculated time must be greater than or equal to 50 µs.

The total ALC takes 63 steps. Calculate the total duration for

ALC as follows:

1024

PFD

VCO ALC TIMEOUT

TIMEOUT

×+

(17)

The minimum value for VCO_ALC_TIMEOUT is 2 and the

maximum value is 31.

PLL Settling Time

The time taken for the loop to settle is inversely proportional to

the low-pass filter bandwidth. The settling time is accurately

modeled in the ADIsimPLL design tool.

Lock Time, a Worked Example

Assume that fPFD = 61.44 MHz,

VCO_BAND_DIV = Ceiling(fPFD/2,400,000) = 26

(18)

where Ceiling() rounds up to the nearest integer.

SYNTH_LOCK_TIMEOUT × 1024 + TIMEOUT > 1228.8 (19)

VCO_ALC_TIMEOUT × 1024 + TIMEOUT > 3072

(20)

There are several suitable values that meet these criteria. By

considering the minimum specifications, the following values

are the most suitable:

•

SYNTH_LOCK_TIMEOUT = 2 (minimum value)

•

VCO_ALC_TIMEOUT = 3

•

TIMEOUT = 2

Much faster lock times than those detailed in this data sheet are

possible by bypassing the calibration processes. Contact an

Analog Devices, Inc., sales representative for more information.

ADF4372 Datasheet(PDF) 17 Page - Analog Devices

ADF4372 Datasheet(HTML) 17 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47

Datasheet Download

Link URL