ADF4372 datasheet(20/47 Pages) AD

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ADF4372

Data Sheet

Rev. 0 | Page 20 of 47

VCO

The VCO in the ADF4372 consists of four separate VCO cores,

Core A, Core B, Core C, and Core D, each of which uses 256

overlapping bands, which allows the device to cover a wide

frequency range without large VCO sensitivity (KV) and without

resultant poor phase noise and spurious performance.

The correct VCO and band are chosen automatically by the

VCO and band select logic whenever Address 0x10 is updated

and automatic calibration is enabled. The VCO tune voltage is

disconnected from the output of the loop filter and is connected

to an internal reference voltage.

The R counter output is used as the clock for the band select

logic. After band selection, normal PLL action resumes. The

nominal value of KV is 50 MHz/V when the N divider is driven

from the VCO output, or the KV value is divided by D. D is

the output divider value if the N divider is driven from the

RF output divider.

The VCO shows variation of KV as the tuning voltage, VTUNE,

varies within the band and from band to band. For wideband

applications covering a wide frequency range (and changing

output dividers), a value of 50 MHz/V provides the most accurate

KV, because this value is closest to the average value. Figure 33

and Figure 34 shows how KV varies with fundamental VCO

frequency along with an average value for the frequency band.

Users may prefer Figure 33 and Figure 34 when using narrow-

band designs.

150

100

110

120

130

140

4.0

8.0

7.5

7.0

6.5

6.0

5.5

5.0

4.5

FREQUENCY (GHz)

Figure 33. VCO Sensitivity, KV vs. Frequency, VCC_VCO = 5 V

Figure 34. VCO Sensitivity, KV vs. Frequency, VCC_VCO = 3.3 V

OUTPUT STAGE

The RF8P pin and the RF8N pin of the ADF4372 connect to

the collectors of a bipolar negative positive negative (NPN)

differential pair driven by buffered outputs of the VCO, as

shown in Figure 35. The ADF4372 contains internal 50 Ω

resistors connected to the VCC_X1 pin. To optimize the power

dissipation vs. the output power requirements, the tail current

of the differential pair is programmable using Bits[1:0] in

Address 0x25. Four current levels can be set. These levels give

approximate output power levels of −4 dBm, −1 dBm, 2 dBm,

and 5 dBm. Levels of −4 dBm, −1 dBm, and 2 dBm can be

achieved by ac coupling into a 50 Ω load. A 5 dBm level

requires an external shunt inductor to VCC_X1. An inductor

has a narrower operating frequency than a 50 Ω resistor.

For accurate power levels, refer to the Typical Performance

Characteristics section. Add an external shunt inductor to

provide higher power levels, which is less wideband than the

internal bias only. Terminate the unused complementary output

with a circuit similar to the used output.

VCO

RF8P

RF8N

VCC_X1

50Ω

BUFFER,

DIVIDE BY

1, 2, 4, 8,

16, 32, 64

Figure 35. Output Stage

The doubled VCO output (8 GHz to 16 GHz) is available on the

RF16P pin and the RF16N pin, which can be directly connected

to the next circuit. The RFAUX8P and the RFAUX8N provide the

same functionality as the RF8x output, but they can output the

divided RF8x frequency or the VCO frequency if desired.

100

4.0

8.0

7.5

7.0

6.5

6.0

5.5

5.0

4.5

FREQUENCY (GHz)

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