ADF4372 datasheet(28/47 Pages) AD

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ADF4372

Data Sheet

Rev. 0 | Page 28 of 47

Address: 0x11, Default: 0x00, Name: REG0011

16-Bit Integer Word.

[7:0] BIT_INTEGER_WORD[15:8] (R/W)

Table 16. Bit Descriptions for REG0011

Bit(s)

Bit Name

Description

Default

Access

[7:0]

BIT_INTEGER_WORD[15:8]

16-Bit Integer Word. Sets the integer value of N.

0x0

R/W

Address: 0x12, Default: 0x40, Name: REG0012

Enables Autocalibration.

Pres caler Select.

[7] RESERVED

[4:0] RESERVED

[6] EN_AUTOCAL (R/W)

[5] PRE_SEL (R/W)

Table 17. Bit Descriptions for REG0012

Bit(s)

Bit Name

Description

Default

Access

RESERVED

Reserved.

0x0

EN_AUTOCAL

Enables Autocalibration.

0x1

R/W

0: VCO autocalibration disabled.

1: VCO autocalibration enabled.

PRE_SEL

Prescaler Select. The dual modulus prescaler is set by this bit. The prescaler, at the input to

the N divider, divides down the VCO signal. This action occurs so the N divider can handle the

signal. The prescaler setting affects the RF frequency and the minimum and maximum INT

value.

0x0

R/W

0: 4/5 prescaler.

1: 8/9 prescaler.

[4:0]

RESERVED

Reserved.

0x0

Address: 0x14, Default: 0x00, Name: REG0014

25-Bit FRAC1 Value.

[7:0] FRAC1WORD[7:0] (R/W)

Table 18. Bit Descriptions for REG0014

Bit(s)

Bit Name

Description

Default

Access

[7:0]

FRAC1WORD[7:0]

25-Bit FRAC1 Value. Sets the FRAC1 value.

0x0

R/W

Address: 0x15, Default: 0x00, Name: REG0015

25-Bit FRAC1 Value.

[7:0] FRAC1WORD[15:8] (R/W)

Table 19. Bit Descriptions for REG0015

Bit(s)

Bit Name

Description

Default

Access

[7:0]

FRAC1WORD[15:8]

25-Bit FRAC1 Value. Sets the FRAC1 value.

0x0

R/W

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