AD3552R datasheet(33/59 Pages) AD

Part #	AD3552R

Description	Single Channel, 12-/16-Bit, 16 MUPS, Multispan, Multi-IO SPI DAC

PDF	59 Pages

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Manufacturer	AD [Analog Devices]

Direct Link	http://www.analog.com

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33 / 59 page

Data Sheet

AD3541R

THEORY OF OPERATION

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Rev. A | 33 of 59

Double Data Rate (DDR)

Irrespective of the SPI mode being used, DDR can be enabled by

setting the SPI_CONFIG_DDR bit in the INTERFACE_CONFIG_D

clock edges, as shown in Figure 4 and Figure 7. After this mode is

enabled, all data must be written using DDR.

DDR is only usable in the data phase during write operations. In

readback operations, the SPI_CONFIG_DDR bit is ignored, and

data is transferred from the AD3541R to the controller in single data

rate, as shown in Figure 2 and Figure 6.

After changing the SPI mode or the SPI_CONFIG_DDR bit, CS

must be brought high and a new access cycle must be started in

the appropriate mode.

All valid SPI mode combinations are listed in Table 12.

Table 12. SPI Mode Combinations

SPI Mode

MULTI_IO_MODE

SPI_CONFIG_DDR

Single SPI SDR

Single SPI DDR

Dual SPI SDR

Dual SPI DDR

AD3552R Datasheet(PDF) 33 Page - Analog Devices