AD3552R datasheet(42/59 Pages) AD

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Data Sheet

AD3541R

REGISTERS

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Rev. A | 42 of 59

Interface Configuration B Register

Address: 0x01, Reset: 0x08, Name: INTERFACE_CONFIG_B

Additional interface configuration settings.

Table 19. Bit Descriptions for INTERFACE_CONFIG_B

Bits

Bit Name

Settings

Description

Reset

Access

SINGLE_INSTRUCTION

Access Mode Bit. Select streaming mode or single instruction mode.

0x0

R/W

0 Streaming mode. The address increments/decrements as successive data

bytes are received according to the ADDR_DIRECTION bit setting in

the INTERFACE_CONFIG_A register and the LENGTH bits setting in the

STREAM_MODE register.

1 Single instruction mode.

[6:4]

RESERVED

Reserved.

0x0

SHORT_INSTRUCTION

Short Instruction Bit. Sets the length of the address in the instruction phase

to 7 bits or 15 bits.

0x1

R/W

0 15-bit addressing.

1 7-bit addressing.

[2:0]

RESERVED

Reserved.

0x0

Device Configuration Register

Address: 0x02, Reset: 0x00, Name: DEVICE_CONFIG

This register is intended for compatibility with the standardized register map and it has no effect on this device.

Table 20. Bit Descriptions for DEVICE_CONFIG

Bits

Bit Name

Settings

Description

Reset

Access

DEVICE_STATUS_3

Device Status Bit 3.

0x0

DEVICE_STATUS_2

Device Status Bit 2.

0x0

DEVICE_STATUS_1

Device Status Bit 1.

0x0

DEVICE_STATUS_0

Device Status Bit 0.

0x0

[3:2]

CUSTOM_MODES

Modes of Operation.

0x0

[1:0]

OPERATING_MODES

Power Modes.

0x0

0 Normal operating mode.

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