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C8051F360 Datasheet(PDF) 126 Page - Silicon Laboratories |
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C8051F360 Datasheet(HTML) 126 Page - Silicon Laboratories |
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126 / 288 page ![]() C8051F360/1/2/3/4/5/6/7/8/9 126 Rev. 1.0 SFR Definition 11.10. MAC0ACC0: MAC0 Accumulator Byte 0 Bits 7–0: Byte 0 (bits 7–0) of MAC0 Accumulator. Note:The contents of this register should not be changed by software during the first two MAC0 pipeline stages. SFR Page: SFR Address: 0 0xD2 R RR RRR RR Reset Value 00000000 Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 SFR Definition 11.11. MAC0OVR: MAC0 Accumulator Overflow Bits 7–0: MAC0 Accumulator Overflow Bits (bits 39–32). Note:The contents of this register should not be changed by software during the first two MAC0 pipeline stages. SFR Page: SFR Address: 0 0xD6 R RR RRR RR Reset Value 00000000 Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 SFR Definition 11.12. MAC0RNDH: MAC0 Rounding Register High Byte Bits 7–0: High Byte (bits 15–8) of MAC0 Rounding Register. SFR Page: SFR Address: 0 0xAF RR RR R RR R Reset Value 00000000 Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 |
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