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C8051F360 Datasheet(PDF) 200 Page - Silicon Laboratories |
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C8051F360 Datasheet(HTML) 200 Page - Silicon Laboratories |
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200 / 288 page ![]() C8051F360/1/2/3/4/5/6/7/8/9 200 Rev. 1.0 SFR Definition 17.25. Bit 7: UNUSED. Read = 0b. Write = don’t care. Bits 6–0: P4.[6:0] Write - Output appears on I/O pins per Crossbar Registers. 0: Logic Low Output. 1: Logic High Output (high impedance if corresponding P4MDOUT.n bit = 0). Read - Directly reads Port pin. 0: P4.n pin is logic low. 1: P4.n pin is logic high. SFR Page: SFR Address: all pages 0xB5 R R/W R/W R/W R/W R/W R/W R/W Reset Value – P4.6 P4.5 P4.4 P4.3 P4.2 P4.1 P4.0 01111111 Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 P4: Port4 SFR Definition 17.26. Bit 7: UNUSED. Read = 0b. Write = don’t care. Bits 6–0: Output Configuration Bits for P4.6-P4.0 (respectively). 0: Corresponding P4.n Output is open-drain. 1: Corresponding P4.n Output is push-pull. SFR Page: SFR Address: F 0xAE R R/W R/W R/W R/W R/W R/W R/W Reset Value – 00000000 Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 P4MDOUT: Port4 Output Mode |
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