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C8051F360 Datasheet(PDF) 198 Page - Silicon Laboratories |
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C8051F360 Datasheet(HTML) 198 Page - Silicon Laboratories |
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198 / 288 page ![]() C8051F360/1/2/3/4/5/6/7/8/9 198 Rev. 1.0 SFR Definition 17.21. Bits 7–0: P3.[7:0] Write - Output appears on I/O pins per Crossbar Registers. 0: Logic Low Output. 1: Logic High Output (high impedance if corresponding P3MDOUT.n bit = 0). Read - Always reads ‘0’ if selected as analog input in register P3MDIN. Directly reads Port pin when configured as digital input. 0: P3.n pin is logic low. 1: P3.n pin is logic high. SFR Page: SFR Address: all pages 0xB0 (bit addressable) R/W R/W R/W R/W R/W R/W R/W R/W Reset Value P3.7 P3.6 P3.5 P3.4 P3.3 P3.2 P3.1 P3.0 11111111 Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 P3: Port3 SFR Definition 17.22. Bits 7–0: Analog Input Configuration Bits for P3.7-P3.0 (respectively). Port pins configured as analog inputs have their weak pullup, digital driver, and digital receiver disabled. 0: Corresponding P3.n pin is configured as an analog input. 1: Corresponding P3.n pin is not configured as an analog input. SFR Page: SFR Address: F 0xF4 R/W R/W R/W R/W R/W R/W R/W R/W Reset Value 11111111 Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 P3MDIN: Port3 Input Mode |
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