IMX95CEC datasheet(56/113 Pages) NXP

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4.11.1.7 uSDHC supported modes

For SD:

• All SD 3.0 protocols are supported at full speeds on all three SDHC interfaces. This includes DS, HS, SDR12, SDR25, SDR50,

SDR104, and DDR50.

• The maximum supported SDR frequency is 200 MHz which is covered in SDR104 mode, and maximum DDR frequency is

50 MHz as a part of DDR50 mode.

For eMMC:

• eMMC HS400 is only supported on SDHC1 as that is the only one with 8-bit interface.

• eMMC HS200 is supported on all three SDHC interfaces because this protocol supports both 4-bit mode and 8-bit mode,

which can work on SDHC2 and SDHC3.

• eMMC High Speed DDR, High Speed SDR, and less than or equal to 26 MHz MMC legacy protocols are also supported on

all three SDHC interfaces.

• The maximum supported SDR frequency is 200 MHz which is covered in HS200 mode, and the maximum DDR frequency is

200 MHz as a part of HS400 mode.

uSDHC3 is multiplexing on GPIO_IO[27:22], below are the modes which are targeted:

• eMMC High Speed DDR, High Speed SDR, and less than or equal to 26 MHz MMC legacy protocols are supported.

• SDR50 (100 MHz) and SDR104 (200 MHz) modes are NOT supported.

• eMMC HS400 and HS200 modes are NOT supported

• The maximum supported SDR and DDR frequency is 50 and 52 MHz

If I/O is supplied by 3.3 V, the maximum supported SDR/DDR frequency is 50/52 MHz

4.11.2 Ethernet controller (ENET)

Ethernet supports the following key features:

• Support ENET AVB

• Support IEEE 1588

• Support Energy Efficient Ethernet (EEE)

• 1.8 V/3.3 V RMII operation, 1.8 V RGMII operation

• SGMII (1G and 2.5G), USXGMI, and XFI

The following sections describe the DC and AC electrical characteristics for the EMI, RMII, RGMII, and IEEE standard

1588 interfaces.

4.11.2.1 Ethernet Management Interface (EMI)

This section describes the electrical characteristics for the EMI interface.

4.11.2.1.1 Ethernet management interface AC Timing specifications

This table describes the EMI AC timing specifications

Table 57. Ethernet management interface AC Timing specifications

Symbol

Description

Min

Typ

Max

Unit

Condition

fMDC

Clock frequency 1

2.5

MHz

—

tMGCH

MDC clock pulse width high

—

Table continues on the next page...

NXP Semiconductors

IMX95CEC

i.MX 95 Applications Processors Data Sheet for Commercial Products

IMX95CEC

All information provided in this document is subject to legal disclaimers.

Preliminary Data Sheet

Rev. 2 — 11 November 2024

Preliminary - Subject to Change Without Notice

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