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IMX95CEC Datasheet(PDF) 76 Page - NXP Semiconductors

Part # IMX95CEC
Description  i.MX 95 Applications Processors Data Sheet for Commercial Products
PDF  113 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
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IMX95CEC Datasheet(HTML) 76 Page - NXP Semiconductors

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Table 81. I3C Push-Pull Timing Parameters for SDR Mode
Symbol
Description
Min
Typ
Max
Unit
Condition
fSCL
SCL Clock Frequency
0.01
12.5
12.9
MHz
FSCL = 1 / (tDIG_L +
tDIG_H)
tDIG_L
SCL Clock Low Period 1,2
32
—
—
ns
—
tDIG_H
SCL Clock High Period 2
32
—
—
ns
—
tSCO
Clock in to Data Out for
Target 3,4
—
—
12
ns
—
tCR
SCL Clock Rise Time 5
—
—
150e06 *
1 / fSCL
(capped
at 60)
ns
—
tCF
SCL Clock Fall Time 5
—
—
150e06 *
1 / fSCL
(capped
at 60)
ns
—
tHD_PP
SDA Signal Data Hold in Push-
Pull Mode, Target 6,7
0
—
—
—
Applicable for target
and controller loopback
modes
tSU_PP
SDA Signal Data Setup in Push-
Pull Mode
3
—
N/A
ns
Applicable for target
and controller loopback
modes
1. As both edges are used, the hold time needs to be satisfied for the respective edges; i.e., tCF + 3 for falling edge clocks,
and tCR + 3 for rising edge clocks.
2. tDIG_L and tDIG_H are the clock Low and High periods as seen at the receiver end of the I3C Bus using VIL and VIH (see
Figure 30)
3. Pad delay based on 90 Ω / 4 mA driver and 50 pF load. Note that Controller may be a Target in a multi-Controller system,
and thus shall also adhere to this requirement
4. Devices with more than 12ns of tSCO delay shall set the limitation bit in the BCR, and shall support the GETMXDS CCC
to allow the Controller to read this value and adjust computations accordingly. For purposes of system design and test
conformance, this parameter should be considered together with pad delay, bus capacitance, propagation delay, and clock
triggering points.
5. The clock maximum rise/fall time is capped at 60 ns. For lower frequency rise and fall the maximum value is limited at 60
ns, and is not dependent upon the clock frequency.
6. SDA Input Hold time in Target mode is 1 ns.
7. tHD_PP is a Hold time parameter for Push-Pull Mode that has a different value for Controller mode vs. Target mode. In
SDR Mode the Hold time parameter is referred to as tHD_SDR.
NXP Semiconductors
IMX95CEC
i.MX 95 Applications Processors Data Sheet for Commercial Products
IMX95CEC
All information provided in this document is subject to legal disclaimers.
© 2024 NXP B.V. All rights reserved.
Preliminary Data Sheet
Rev. 2 — 11 November 2024
Preliminary - Subject to Change Without Notice
76 / 113



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