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IMX95CEC Datasheet(PDF) 9 Page - NXP Semiconductors |
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IMX95CEC Datasheet(HTML) 9 Page - NXP Semiconductors |
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9 / 113 page ![]() The package contact assignments can be found in Section, "Package information and contact assignments”. Signal descriptions are provided in the i.MX 95 Reference Manual (IMX95RM). Table 3. Special signal considerations Signal Name Remarks CLKIN1/CLKIN2 CLKIN1 and CLKIN2 are input pins without internal pull-up and pull-down. NC These signals are No Connect (NC) and should be unconnected in the application. ONOFF A brief connection to GND in the OFF mode causes the internal power management state machine to change the state to ON. In the ON mode, a brief connection to GND generates an interrupt (intended to be a software-controllable power-down). Approximately five seconds (or more) to GND causes a forced OFF. POR_B POR_B has no internal pull-up/down resistor, and requires external pull-up resistor to NVCC_BBSM. It is recommended that POR_B is properly handled during power up/down. Please refer to the EVK design for details. RTC_XTALI/ RTC_XTALO RTC_XTALI and RTC_XTALO can be coupled to an external crystal element to generate 32.768K clock. Care must be taken to account parasitic capacitance of the pins in order to match the trimmed crystal assumptions for frequency accuracy. Care should also be taken to limit the parasitic leakage on or between RTC_XTALI and RTC_XTALO. This can debias the integrated amplifier resulting in reduced startup margin. If you want to feed an external low-frequency clock into RTC_XTALI, the RTC_XTALO pin must remain unconnected or driven by a complementary signal. The logic level of this forcing clock must not exceed the VDD_ANA_1P8 level and the frequency shall be < 50 kHz under the typical conditions. XTALI_24M/ XTALO_24M The system requires a 24 MHz clock to operate. A 24 MHz crystal can be created by coupling an appropriately tuned quartz element to XTALI and XTALO. Care must be taken that the resulting oscillation frequency complies with the utilized serial interface standards such as PCIe and USB. 3.1 Unused input and output guidance If a function of the i.MX 95 is not used, the I/Os and power rails of that function can be terminated to reduce overall board power. Table 4. Unused function strapping recommendations for LVDS Function Pin name Recommendations if unused Single LVDS0 LVDS0_CLK_P, LVDS0_CLK_N, LVDS0_Dx_P, LVDS0_Dx_N Not connected Single LVDS1 LVDS1_CLK_P, LVDS1_CLK_N, LVDS1_Dx_P, LVDS1_Dx_N Not connected Both LVDS0 and LVDS1 LVDS0_CLK_P, LVDS0_CLK_N, LVDS0_Dx_P, LVDS0_Dx_N, LVDS1_CLK_P, LVDS1_CLK_N, LVDS1_Dx_P, LVDS1_Dx_N, Not connected VDD_LVDS_1P8 Tie to ground using a 10K resistor NXP Semiconductors IMX95CEC i.MX 95 Applications Processors Data Sheet for Commercial Products IMX95CEC All information provided in this document is subject to legal disclaimers. © 2024 NXP B.V. All rights reserved. Preliminary Data Sheet Rev. 2 — 11 November 2024 Preliminary - Subject to Change Without Notice 9 / 113 |
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