IMX95CEC datasheet(96/113 Pages) NXP

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4.11.13.13 REFCLK IN DC characteristics

Table 111. REFCLK IN DC characteristics

Symbol

Description

Min

Typ

Max

Unit

Condition

TCLK_DUTY

Reference clock duty cycle 1

—

SWREF_CLK

Rising/Falling Edge Rate 2

0.6

—

V/ns

—

VMAX

Absolute maximum voltage at

pinincluding overshoot 3

—

1.15

—

VMIN

Absolute minimum voltage at

pinincluding overshoot 3

-0.3

—

VMAX

Maximum input voltage level 3

—

0.88

—

VMIN

Minimum input voltage level 3

-0.15

—

Viswing

Single-ended input swing

0.3

—

0.88

VPP

—

Vidiff

Differential input swing

0.3

—

1.76

VPPdiff

—

1. Measurement taken from differential waveform.

2. Measured from -150 mV to +150 mV on the differential waveform (derived from REF_PAD_CLK_P minus

REF_PAD_CLK_N). The signal must be monotonic through the measurement region for rise and fall time. The 400 mV

measurement window is centered on the differential zero crossing.

3. Measurement taken from single ended waveform.

Rise edge rate

Fall edge rate

VIH = +150 mV

VIL = -150 mV

REFCLK+

minus

0.0 V

Figure 50. Differential measurement points for Rise and Fall time

VMAX = 1.15 V

VCROSS MAX = 550 mV

VCROSS MIN = 250 mV

VMIN = -0.30 V

REFCLK-

REFCLK+

Figure 51. Single-Ended measurement points for absolute cross point and swing

NXP Semiconductors

IMX95CEC

i.MX 95 Applications Processors Data Sheet for Commercial Products

IMX95CEC

All information provided in this document is subject to legal disclaimers.

Preliminary Data Sheet

Rev. 2 — 11 November 2024

Preliminary - Subject to Change Without Notice

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