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IMX95CEC Datasheet(PDF) 97 Page - NXP Semiconductors |
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IMX95CEC Datasheet(HTML) 97 Page - NXP Semiconductors |
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97 / 113 page  4.11.13.14 REFCLK IN AC specifications in common clocked architecture Table 112. REFCLK IN AC specifications in common clocked architecture Symbol Description Min Typ Max Unit Condition FREFCLK Refclk frequency without SSC (SRNS) 99.97 100 100.03 MHz — FREF_OFFSET Reference clock frequency offset without SSC -300 — 300 ppm — FREF_OFFSET Reference clock frequency offset with SSC -300 — 2800 ppm — FREFCLK-RMS- CC RMS Refclk jitter for common Refclk Rx architecture for 8GT/s — — 1 ps RMS — FREFCLK-HF-RMS RMS Refclk jitter for common Refclk Rx architecture > 1.5 MHz for 5 GT/s — — 3.1 ps RMS — FREFCLK-LF-RMS RMS Refclk jitter for common Refclk Rx architecture 10 kHz - 1.5 MHz for 5 GT/s — — 3 ps RMS — FSSC SSC frequency range 30 — 33 kHZ — TSSC-FREQ- DEVIATION SSC deviation — — ±0.5 % — TTRANSPORT- DELAY Tx-Rx transport delay 12 — — ns — 4.11.13.15 REFCLK IN AC specifications in separate clocked architecture Table 113. REFCLK IN AC specifications in separate clocked architecture Symbol Description Min Typ Max Unit Condition FREFCLK Refclk frequency without SSC (SRNS) 99.97 100 100.03 MHz — FREF_OFFSET Reference clock frequency offset without SSC -300 — 300 ppm — FREF_OFFSET Reference clock frequency offset with SSC (SRIS) -300 — 2800 ppm — TREFCLK-RMS- SRIS RMS Refclk jitter for separate Refclk independent SSC architecture — — 0.5 ps RMS 8 GT/s TREFCLK-RMS- SRIS RMS Refclk jitter for separate Refclk independent SSC architecture — — 2.0 ps RMS 5 GT/s FSSC SSC frequency range 30 — 33 kHZ — TSSC-FREQ- DEVIATION SSC deviation — — ±0.5 % — NXP Semiconductors IMX95CEC i.MX 95 Applications Processors Data Sheet for Commercial Products IMX95CEC All information provided in this document is subject to legal disclaimers. © 2024 NXP B.V. All rights reserved. Preliminary Data Sheet Rev. 2 — 11 November 2024 Preliminary - Subject to Change Without Notice 97 / 113 |
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